[参考译文] TMS320F28069：使用带有 CLA 的复制表/扩展 CLA 程序存储器/CLA 存储器优化/ CLA 存储器不足

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请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1247762/tms320f28069-using-copy-tables-with-cla-expanding-cla-program-memory-cla-memory-optimization-not-enough-cla-memory

器件型号：TMS320F28069

有人能不能提供在 CLA 中运行带有复制表的程序所需的行。

有两个任务。任务1和任务8

这两个函数的映射如下。

   UNION {
    .Cla1Task1 : LOAD = FLASHE PAGE = 0, table (_task1_copy_table)
    .Cla1Task8 : LOAD = FLASHE PAGE = 0, table (_task8_copy_table)
   }run = RAML3  PAGE = 0

   .ovly > FLASHE   PAGE = 0

然后我执行以下操作

  
  
  
   EALLOW;

  
    Cla1Regs.MPISRCSEL1.bit.PERINT1SEL = CLA_INT1_NONE;


    memcpy(&cla1Funcs_runstart, &cla1Funcs_loadstart, (Uint32) &cla1Funcs_loadsize);

    Cla1Regs.MMEMCFG.all = CLA_PROG_ENABLE | CLARAM0_ENABLE | CLARAM1_ENABLE | CLARAM2_ENABLE | CLA_RAM1CPUE;
    Cla1Regs.MCTL.bit.IACKE = 1;

    Cla1Regs.MIER.all = 0x00FF;

    EDIS;
    
    
     copy_in(&task8_copy_table);
    EALLOW;
    Cla1Regs.MVECT8 = (Uint16) ((Uint32) &Cla1Task8 - (Uint32) &Cla1Prog_Start);
    EDIS;
    Cla1ForceTask8andWait();

    copy_in(&task1_copy_table);
    EALLOW;
    Cla1Regs.MVECT1 = (Uint16) ((Uint32) &Cla1Task1 - (Uint32) &Cla1Prog_Start);
    EDIS;

但没有发生任何情况。任务不运行。这里出了什么问题。

有人能至少在这里提供必要的步骤吗？

请注意、如果没有这个复制表、CLA 运行正常。由于程序 RAM 限制、我不得不加入复制表。

2 年多前

0 admin 2 年多前

TI__Guru**** 2297800 points

请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

您好！

它是否成功地将程序从闪存复制到 RAM？我没有看到链接器 cmd 文件中提到的运行地址。

此致、

维纳

0 admin 2 年多前

TI__Guru**** 2297800 points

请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

您好

我能够使代码正常运行。运行链接器中提及但我在此处未包含的地址并将其添加到链接器中。

下面我将介绍如何帮助遇到同样的 CLA 程序存储器耗尽问题的人。

诀窍是、在调用 copy_in 之前、每次我都必须对 Cla1Regs.MMEMCFG.all 位进行重新编程。否则、C28内核无法访问 CLA 程序空间、copy_in 无法复制程序的第二部分。。
以下代码显示了我已经执行的步骤。

任务8是第一个使用来初始化 CLA 变量的任务。任务1是重复任务、它将在代码中的某个位置被触发。

Cla1Regs.MVECT8被配置为0是因为、出于某种原因、编译器将 UNION 段放在 CLA 程序空间的开头、然后 CLA 程序的其余部分(Cla1Prog)被放置在相同的存储器区域(RAML3)中。能不能让你明白为什么会发生这种情况。我们如何配置、其中代码段放置在同一存储器段中。

此处还包含链接器代码以供参考。

EALLOW;

    Cla1Regs.MPISRCSEL1.bit.PERINT1SEL = CLA_INT1_NONE;
    Cla1Regs.MPISRCSEL1.bit.PERINT8SEL = CLA_INT8_NONE;

       memcpy(&cla1Funcs_runstart, &cla1Funcs_loadstart, (Uint32) &cla1Funcs_loadsize);
       memcpy(&mathTablesRunStart, &mathTablesLoadStart, (Uint32) &mathTablesLoadSize);  // load cla math tables for cla sine and cos functions

       EDIS;

       copy_in(&task8_copy_table);
       EALLOW;


       Cla1Regs.MVECT8 = 0;
       Cla1Regs.MPISRCSEL1.bit.PERINT8SEL = CLA_INT8_NONE;
       Cla1Regs.MIER.all = 0x00FF;

       Cla1Regs.MMEMCFG.all = CLA_PROG_ENABLE | CLARAM0_ENABLE | CLARAM1_ENABLE | CLARAM2_ENABLE | CLA_RAM1CPUE;
       Cla1Regs.MCTL.bit.IACKE = 1;
       EDIS;

       Cla1ForceTask8andWait();

       EALLOW;
       Cla1Regs.MIER.all = 0x0000;
       Cla1Regs.MPISRCSEL1.bit.PERINT1SEL = CLA_INT1_NONE;
       Cla1Regs.MMEMCFG.all =0;
       EDIS;


       copy_in(&task1_copy_table);
       EALLOW;
       Cla1Regs.MVECT1 = 0;
       Cla1Regs.MMEMCFG.all = CLA_PROG_ENABLE | CLARAM0_ENABLE | CLARAM1_ENABLE | CLARAM2_ENABLE | CLA_RAM1CPUE;
       Cla1Regs.MIER.all = 0x00FF;
       EDIS;

MEMORY
{
PAGE 0 :   /* Program Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */

   //RAML1       : origin = 0x008800, length = 0x000400     /* on-chip RAM block L1 */
   RAML3       : origin = 0x009000, length = 0x001000	  /* CLA program ram
   OTP         : origin = 0x3D7800, length = 0x000400     /* on-chip OTP */

   FLASHH      : origin = 0x3D8000, length = 0x004000     /* on-chip FLASH */
   FLASHG      : origin = 0x3DC000, length = 0x004000     /* on-chip FLASH */
   FLASHF      : origin = 0x3E0000, length = 0x004000     /* on-chip FLASH */
   FLASHE      : origin = 0x3E4000, length = 0x004000     /* on-chip FLASH */   
   FLASHD      : origin = 0x3E8000, length = 0x004000     /* on-chip FLASH */
   FLASHA      : origin = 0x3EC000, length = 0x007F80     /* on-chip FLASH */
   //FLASHA      : origin = 0x3F4000, length = 0x003F80     /* on-chip FLASH */
   CSM_RSVD    : origin = 0x3F7F80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
   BEGIN       : origin = 0x3F7FF6, length = 0x000002     /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
   CSM_PWL_P0  : origin = 0x3F7FF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA */

   FPUTABLES   : origin = 0x3FD860, length = 0x0006A0	  /* FPU Tables in Boot ROM */
   IQTABLES    : origin = 0x3FDF00, length = 0x000B50     /* IQ Math Tables in Boot ROM */
   IQTABLES2   : origin = 0x3FEA50, length = 0x00008C     /* IQ Math Tables in Boot ROM */
   IQTABLES3   : origin = 0x3FEADC, length = 0x0000AA	  /* IQ Math Tables in Boot ROM */

   ROM         : origin = 0x3FF3B0, length = 0x000C10     /* Boot ROM */
   RESET       : origin = 0x3FFFC0, length = 0x000002     /* part of boot ROM  */
   VECTORS     : origin = 0x3FFFC2, length = 0x00003E     /* part of boot ROM  */

PAGE 1 :   /* Data Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
           /* Registers remain on PAGE1                                                  */

   BOOT_RSVD   : origin = 0x000000, length = 0x000050     /* Part of M0, BOOT rom will use this for stack */
   RAMM0       : origin = 0x000050, length = 0x0003B0     /* on-chip RAM block M0 */
   RAMM1       : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
   RAML0L1L2   : origin = 0x008000, length = 0x001000     /* CLA data ram L0 l1 l2 */
  // CLAMSGRAM1  : origin = 0x008C00, length = 0x000200     /* on-chip RAM block L2 */
   //CLAMSGRAM2  : origin = 0x008E00, length = 0x000200     /* on-chip RAM block L2 */

   CLA1_MSGRAMLOW       : origin = 0x001480, length = 0x000080
   CLA1_MSGRAMHIGH      : origin = 0x001500, length = 0x000080


   RAML4       : origin = 0x00A000, length = 0x004000     /* on-chip RAM block L4 */
  // RAML5       : origin = 0x00C000, length = 0x002000     /* on-chip RAM block L5 */
   RAML6       : origin = 0x00E000, length = 0x002000     /* on-chip RAM block L6 */
   RAML7       : origin = 0x010000, length = 0x002000     /* on-chip RAM block L7 */
   RAML8       : origin = 0x012000, length = 0x002000     /* on-chip RAM block L8 */
   USB_RAM     : origin = 0x040000, length = 0x000800     /* USB RAM		  */   
   FLASHB      : origin = 0x3F0000, length = 0x004000     /* on-chip FLASH */     
}




SECTIONS
{
   .scratchpad      : > RAML0L1L2,   PAGE = 1
   .bss_cla		    : > RAML0L1L2,   PAGE = 1
   .const_cla	    : > RAML0L1L2,   PAGE = 1

   /* Allocate program areas: */
   .cinit              : > FLASHA,     PAGE = 0
   .pinit              : > FLASHA,     PAGE = 0
   .text               : > FLASHA,     PAGE = 0
   codestart           : > BEGIN,      PAGE = 0

   ClaToCpuMsgRAM     : > CLA1_MSGRAMLOW,            PAGE = 1                /* Link to PF0 - CLA Message RAM */
   CpuToClaMsgRAM     : > CLA1_MSGRAMHIGH,            PAGE = 1                /* Link to PF0 - CLA Message RAM */


   csmpasswds          : > CSM_PWL_P0, PAGE = 0
   csm_rsvd            : > CSM_RSVD,   PAGE = 0

   /* Allocate uninitalized data sections: */
   .stack              : > RAMM0,      PAGE = 1
   .ebss               : > RAML4,      PAGE = 1
   .esysmem            : > RAML6,      PAGE = 1
   .cio                : > RAML6,      PAGE = 1
   /* Initalized sections to go in Flash */
   /* For SDFlash to program these, they must be allocated to page 0 */
   .econst             : > FLASHA,     PAGE = 0
   .switch             : > FLASHA,     PAGE = 0

   /* Allocate IQ math areas: */
   IQmath              : > FLASHA,     PAGE = 0            /* Math Code */
   IQmathTables        : > IQTABLES,   PAGE = 0, TYPE = NOLOAD
   
   /* Allocate FPU math areas: */
   FPUmathTables       : > FPUTABLES,  PAGE = 0, TYPE = NOLOAD
   
 //  DMARAML5	           : > RAML5,      PAGE = 1
  // DMARAML6	           : > RAML6,      PAGE = 1
  // DMARAML7	           : > RAML7,      PAGE = 1
  // DMARAML8	           : > RAML8,      PAGE = 1


   ramfuncs            : LOAD = FLASHA, PAGE = 0
                         RUN = RAML4,   PAGE = 1
                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_END(_RamfuncsLoadEnd),
                         RUN_START(_RamfuncsRunStart),
                         LOAD_SIZE(_RamfuncsLoadSize)



   dclfuncs		    :    LOAD = FLASHA,  PAGE = 0
                         RUN = RAML4,    PAGE = 1
                         LOAD_START(_DclfuncsLoadStart),
                         LOAD_END(_DclfuncsLoadEnd),
                         RUN_START(_DclfuncsRunStart),
                         LOAD_SIZE(_DclfuncsLoadSize)


   Cla1Prog           :   LOAD = FLASHE, PAGE = 0,            /* Load to flash, run from CLA Prog RAM */
                          RUN_START(_Cla1Prog_Start)
                          RUN = RAML3,       PAGE = 0
                          LOAD_START(_cla1Funcs_loadstart),
                          LOAD_SIZE(_cla1Funcs_loadsize),
                          RUN_START(_cla1Funcs_runstart)

   CLAscratch         : { *.obj(CLAscratch)                              /* Scratchpad memory for the CLA C Compiler */
                          . += CLA_SCRATCHPAD_SIZE;
                          *.obj(CLAscratch_end)
                        } > RAML0L1L2,           PAGE = 1


   CLA1mathTables	: LOAD= FLASHE, PAGE = 0,
                      LOAD_START(_mathTablesLoadStart),
                      LOAD_END(_mathTablesLoadEnd),
                      LOAD_SIZE(_mathTablesLoadSize),
                      RUN = RAML0L1L2,  PAGE = 1
                      RUN_START(_mathTablesRunStart)


   UNION {
    .Cla1Task1 : LOAD = FLASHE PAGE = 0, table (_task1_copy_table)
    .Cla1Task8 : LOAD = FLASHE PAGE = 0, table (_task8_copy_table)
   }RUN = RAML3  PAGE = 0

   .ovly > FLASHE   PAGE = 0

   
   
   .reset              : > RESET,      PAGE = 0, TYPE = DSECT
   vectors             : > VECTORS,    PAGE = 0, TYPE = DSECT

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

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[参考译文] TMS320F28069：使用带有 CLA 的复制表/扩展 CLA 程序存储器/CLA 存储器优化/ CLA 存储器不足