[参考译文] TMS320F2800156-Q1：ADC-DAC 环回测试

您好！  

由于 ADC 模块始终对 CMPSS1 DACL 输出进行采样、并且您使用的器件没有 CMPSS1、因此无法进行 环回测试。

让我请其他专家看看如何在没有 cmps1的情况下进行测试。

此致、

哈迪

尊敬的 Mesut：

对于没有 CMPSS 的设备,  CMPSS_LITE 模块应该可以工作,您可以尝试 使用 CMPSS_LITE 模块进行回送测试吗?

此致、

哈迪

尊敬的 Hadi：

感谢您的回答。

我已经尝试使用  CMPSS_LITE 模块进行环回测试。 它没有工作。 我始终测量0。

但是、 型号中不包含的 CMPSS1模块已经起作用。 当我更新 DACL 值时、ADC 结果发生变化。 在 CCS 中、 CMPSS1具有寄存器、值发生变化。 这是奇怪的。  

在 DS  表4-1中。 器件比较显示器件型号 没有 CMPSS 模块、但我正在使用它。 SysConfig 具有用于 TMS320F2800156-Q1型号的 CMPSS1模块、并会为其生成代码。  

这是我的工作代码、但根据文档、它不应该工作。 (DS 和 TRM)

#include "driverlib.h"
#include "device.h"
#include "board.h"
#include "c2000ware_libraries.h"

#define myADC0_BASE ADCA_BASE
#define myADC0_RESULT_BASE ADCARESULT_BASE

#define myCMPSS0_BASE CMPSS1_BASE
#define myCMPSS0_HIGH_COMP_BASE CMPSS1_BASE    
#define myCMPSS0_LOW_COMP_BASE CMPSS1_BASE   

uint16_t myADC0Result[3];

//Generated by Sysconfig
void myCMPSS0_init(){
    //
    // Select the value for CMP1HPMXSEL.
    //
    ASysCtl_selectCMPHPMux(ASYSCTL_CMPHPMUX_SELECT_1,0U);
    //
    // Select the value for CMP1LPMXSEL.
    //
    ASysCtl_selectCMPLPMux(ASYSCTL_CMPLPMUX_SELECT_1,0U);
    //
    // Sets the configuration for the high comparator.
    //
    CMPSS_configHighComparator(myCMPSS0_BASE,(CMPSS_INSRC_DAC));
    //
    // Sets the configuration for the low comparator.
    //
    CMPSS_configLowComparator(myCMPSS0_BASE,(CMPSS_INSRC_DAC));
    //
    // Sets the configuration for the internal comparator DACs.
    //
    CMPSS_configDACHigh(myCMPSS0_BASE,(CMPSS_DACVAL_SYSCLK | CMPSS_DACSRC_SHDW));
    CMPSS_configDACLow(myCMPSS0_BASE, CMPSS_DACSRC_SHDW);
    //
    // Sets the value of the internal DAC of the high comparator.
    //
    CMPSS_setDACValueHigh(myCMPSS0_BASE,1500U);
    //
    // Sets the value of the internal DAC of the low comparator.
    //
    CMPSS_setDACValueLow(myCMPSS0_BASE,2000U);
    //
    //  Configures the digital filter of the high comparator.
    //
    CMPSS_configFilterHigh(myCMPSS0_BASE, 0U, 1U, 1U);
    //
    // Configures the digital filter of the low comparator.
    //
    CMPSS_configFilterLow(myCMPSS0_BASE, 0U, 1U, 1U);
    //
    // Sets the output signal configuration for the high comparator.
    //
    CMPSS_configOutputsHigh(myCMPSS0_BASE,(CMPSS_TRIPOUT_ASYNC_COMP | CMPSS_TRIP_ASYNC_COMP));
    //
    // Sets the output signal configuration for the low comparator.
    //
    CMPSS_configOutputsLow(myCMPSS0_BASE,(CMPSS_TRIPOUT_ASYNC_COMP | CMPSS_TRIP_ASYNC_COMP));
    //
    // Sets the comparator hysteresis settings.
    //
    CMPSS_setHysteresis(myCMPSS0_BASE,0U);
    //
    // Configures the comparator subsystem's high ramp generator.
    //
    CMPSS_configRampHigh(myCMPSS0_BASE, CMPSS_RAMP_DIR_DOWN, 0U,0U,0U,1U,true);
    //
    // Configures the comparator subsystem's low ramp generator.
    //
    CMPSS_configRampLow(myCMPSS0_BASE, CMPSS_RAMP_DIR_DOWN, 0U,0U,0U,1U,true);
    //
    // Disables reset of HIGH comparator digital filter output latch on PWMSYNC
    //
    CMPSS_disableLatchResetOnPWMSYNCHigh(myCMPSS0_BASE);
    //
    // Disables reset of LOW comparator digital filter output latch on PWMSYNC
    //
    CMPSS_disableLatchResetOnPWMSYNCLow(myCMPSS0_BASE);
    //
    // Sets the ePWM module blanking signal that holds trip in reset.
    //
    CMPSS_configBlanking(myCMPSS0_BASE,1U);
    //
    // Disables an ePWM blanking signal from holding trip in reset.
    //
    CMPSS_disableBlanking(myCMPSS0_BASE);
    //
    // Configures whether or not the digital filter latches are reset by PWMSYNC
    //
    CMPSS_configLatchOnPWMSYNC(myCMPSS0_BASE,false,false);
    //
    // Disables the CMPSS module.
    //
    CMPSS_disableModule(myCMPSS0_BASE);

    //
    // Delay for CMPSS DAC to power up.
    //
    DEVICE_DELAY_US(500);
}

//
// Main
//
void main(void)
{

    //
    // Initialize device clock and peripherals
    //
    Device_init();

    //
    // Disable pin locks and enable internal pull-ups.
    //
    Device_initGPIO();

    //
    // Initialize PIE and clear PIE registers. Disables CPU interrupts.
    //
    Interrupt_initModule();

    //
    // Initialize the PIE vector table with pointers to the shell Interrupt
    // Service Routines (ISR).
    //
    Interrupt_initVectorTable();

    //
    // PinMux and Peripheral Initialization
    //
    Board_init();

    // Configures a start-of-conversion (SOC) in the ADC and its interrupt SOC trigger.
    ADC_setupSOC(myADC0_BASE, ADC_SOC_NUMBER0, ADC_TRIGGER_SW_ONLY, ADC_CH_ADCIN5, 500U);
    ADC_setInterruptSOCTrigger(myADC0_BASE, ADC_SOC_NUMBER0, ADC_INT_SOC_TRIGGER_NONE);

    ADC_setupSOC(myADC0_BASE, ADC_SOC_NUMBER1, ADC_TRIGGER_SW_ONLY, ADC_CH_ADCIN1, 360U);
    ADC_setInterruptSOCTrigger(myADC0_BASE, ADC_SOC_NUMBER1, ADC_INT_SOC_TRIGGER_NONE);

    ADC_setupSOC(myADC0_BASE, ADC_SOC_NUMBER2, ADC_TRIGGER_SW_ONLY, ADC_CH_ADCIN0, 360U);
    ADC_setInterruptSOCTrigger(myADC0_BASE, ADC_SOC_NUMBER2, ADC_INT_SOC_TRIGGER_NONE);

    ASysCtl_enableADCDACLoopback(ASYSCTL_ADCDACLOOPBACK_ENLB2ADCA);

    CMPSS_enableModule(CMPSS1_BASE);

    uint16_t dacl = 1000U;

    //
    // C2000Ware Library initialization
    //
    C2000Ware_libraries_init();

    //
    // Enable Global Interrupt (INTM) and real time interrupt (DBGM)
    //
    EINT;
    ERTM;

    while(1)
    {
      dacl += 100;
      CMPSS_setDACValueLow(CMPSS1_BASE,dacl);

      //
      // Convert, wait for completion, and store results
      //
      ADC_forceMultipleSOC(myADC0_BASE, (ADC_FORCE_SOC0 | ADC_FORCE_SOC1 | ADC_FORCE_SOC2));

      //
      // Wait for ADCA to complete, then acknowledge flag
      //
      while(ADC_isBusy(myADC0_BASE) != false);

      //
      // Store results
      //
      int i;
      for(i=0; i<3; ++i)
      {
        myADC0Result[i] = ADC_readResult(ADCARESULT_BASE, (ADC_SOCNumber)((int)ADC_SOC_NUMBER0+i));
      }

      //
      // Hit run again to get updated conversions.
      //
      ESTOP0;
        
    }
}

//
// End of File
//

DEV CFG 寄存器的寄存器信息

PARTIDL = 0x00064280
PARTIDH = 0x07FE0500
REVID = 0x00000002

谢谢