TMS320F28377S: Why can't the delay be updated in a timely manner when modifying the SWVDELVAL of the DC module in ADC interrupts to achieve delay.

Part Number: TMS320F28377S


My DC module configuration is as follows. I modified EPwm2Regs.SWVDELVAL in the interrupt, but the delay cannot be updated in a timely manner. Moreover, I observed the EPwm2Regs.HWVDELVAL value in CCS in real time, which is different from EPwm2Regs.SWVDELVAL.

    EPwm2Regs.DCAHTRIPSEL.bit.TRIPINPUT4 = 1;//DCAH = TRIP4
    EPwm2Regs.TZDCSEL.bit.DCAEVT1 = 2;//DCAH = high
    EPwm2Regs.DCACTL.bit.EVT1SRCSEL = 1;
    EPwm2Regs.DCACTL.bit.EVT1FRCSYNCSEL = 1;
    EPwm2Regs.DCACTL.bit.EVT1SYNCE = 1;
    //时间滤波
    EPwm2Regs.DCFCTL.bit.SRCSEL = 0;
    EPwm2Regs.DCFCTL.bit.EDGEFILTSEL = 1;   //enable edge filter
    EPwm2Regs.DCFCTL.bit.EDGEMODE = 0;      //Edge Mode Select
    EPwm2Regs.DCFCTL.bit.EDGECOUNT = 0;      // Edge Count
    EPwm2Regs.VCAPCTL.bit.TRIGSEL = 1;//
    EPwm2Regs.VCAPCTL.bit.VCAPE = 1;//
    EPwm2Regs.VCAPCTL.bit.EDGEFILTDLYSEL = 1;// DELAY
    EPwm2Regs.VCAPCTL.bit.VDELAYDIV = 0;
    EPwm2Regs.SWVDELVAL= Tdelay;
    EPwm2Regs.DCFCTL.bit.BLANKE = 1;
    EPwm2Regs.DCFCTL.bit.PULSESEL = 1;
    EPwm2Regs.DCFOFFSET = 1;
    EPwm2Regs.DCFWINDOW = 1;
    EPwm2Regs.DCCAPCTL.bit.CAPE = 0;