TMS320F28335: 一个PWM可以使用两个TZ信号作为跳闸信号源吗

我想使用两个TZ信号源作为１个PWM的跳闸源，但是我在配置过后并不能实现，请问TMS320F28335可以将两个TZ源（有一个触发就会刹车）作为一个PWM的标志吗，如果可以应该如何配置。

以下为我的PWM配置

void InitEPwm1(void)
{
    // step1 
    EALLOW;
    SysCtrlRegs.PCLKCR1.bit.EPWM1ENCLK = 1;  // ePWM1
    EPwm1Regs.TZFRC.bit.OST = 1;
    EPwm1Regs.TBPRD               = PWM_HALF_PRD*2;      
    EPwm1Regs.TBPHS.half.TBPHS    = 0x0001;            
    EPwm1Regs.TBCTR               = 0x0000;             

    EPwm1Regs.CMPA.half.CMPA = PWM_HALF_PRD; 

//    EPwm1Regs.CMPB = PWM_HALF_PRD/2; 

    // ���ü���ģʽ
    EPwm1Regs.TBCTL.bit.CTRMODE   = TB_COUNT_UP;   
    EPwm1Regs.TBCTL.bit.PHSEN     = TB_DISABLE;        
    EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;           // Clock ratio to SYSCLKOUT ,
    EPwm1Regs.TBCTL.bit.CLKDIV    = TB_DIV1;           // TBCLK=SYSCLKOUT/(HSPCLKDIV*CLKDIV)=60MHz
    EPwm1Regs.TBCTL.bit.PRDLD     = TB_SHADOW;         // The TB_PRD register (TBPRD) is loaded from its shadow register�����Ƿ�ʹ��Ӱ�ӼĴ���,
    // when the time-base counter,TBCTR, is equal to zero
    EPwm1Regs.TBCTL.bit.SYNCOSEL  = TB_CTR_ZERO;       
   // EPwm2Regs.TBCTL.bit.SWFSYNC = TB_ENABLE;
   // EPwm2Regs.TBCTL.bit.PHSDIR = TB_UP;
    // Setup shadowing
    EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;        
    EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;        
    EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;      // Load on Zero
    EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;      
    // ���ö���
    EPwm1Regs.AQCTLA.bit.ZRO = AQ_SET;
    EPwm1Regs.AQCTLA.bit.CAU = AQ_CLEAR;                 // Set PWM1A on event A, up count
//    EPwm2Regs.AQCTLB.bit.ZRO = AQ_SET;
//    EPwm2Regs.AQCTLB.bit.CAU = AQ_CLEAR;                 // Set PWM1A on event A, up count
    //EPwm2Regs.AQCTLA.bit.PRD = AQ_CLEAR;
    //EPwm2Regs.AQCTLA.bit.CAD = AQ_CLEAR;               // Clear PWM1A on event A, down count
    //
    EPwm1Regs.DBCTL.bit.IN_MODE = DBA_ALL;             // enable Dead-band module
    EPwm1Regs.DBCTL.bit.POLSEL  = DB_ACTV_HIC;         // Active high complementary mode. EPWMxA is inverted
    EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;     
    EPwm1Regs.DBFED = 130;                             
    EPwm1Regs.DBRED = 130;                           
    
    EPwm1Regs.TZCTL.bit.TZA = TZ_FORCE_LO;  
    EPwm1Regs.TZCTL.bit.TZB = TZ_FORCE_LO; 
    EPwm1Regs.TZFRC.bit.OST = 1;         
    //EPwm2Regs.TZEINT.bit.OST = 1;     
    EPwm1Regs.TZSEL.bit.OSHT1 =TZ_ENABLE;    
    EPwm1Regs.TZSEL.bit.OSHT4 =TZ_ENABLE;
    EDIS;
}