您好,在设置EPWM死区模块时,用示波器观察输出EPWM波形,发现如下现象。EPWM1A经过死区模块,但是不翻转,示波器观察的是正常波形。但其他条件不变,EPWM1经过死区模块,经过翻转,即配置DBCTL[POLSEL]模块,用示波器观察输出波形,发现EPWM1已经翻转,但翻转前有个短波,且为高电平,请问这一现象怎么解释。
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您好,在设置EPWM死区模块时,用示波器观察输出EPWM波形,发现如下现象。EPWM1A经过死区模块,但是不翻转,示波器观察的是正常波形。但其他条件不变,EPWM1经过死区模块,经过翻转,即配置DBCTL[POLSEL]模块,用示波器观察输出波形,发现EPWM1已经翻转,但翻转前有个短波,且为高电平,请问这一现象怎么解释。
好的,EPWM代码如下:死区时间为0,频率为100khz.EPWM1和EPWM2配置一样,波形如链接所示,以EPWM1A的上升沿为触发,EPWM1B和EPWM2B在程序中设置了翻转,可以看到出发前有两个短波,而且EPWM1B比EPWM2B短波时间要长。
void Init_epwm1(void) { EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up-down EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1; EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Enable phase loading EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW; // TBPRD is loaded from its shadow register EPwm1Regs.TBPRD = EPWM_PRD; // Set timer period (100kHz) EPwm1Regs.TBPHS.half.TBPHS = 0x0000; // Phase is 0 EPwm1Regs.TBCTR = 0x0000; // Clear counter EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO; // 同步信号输出选择TBCTR=0 EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; // CMPA Shadow mode EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // Load on CTR = 0 EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW; // CMPA Shadow mode EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO; // Load on CTR = 0 EPwm1Regs.CMPA.half.CMPA = 2*D* EPWM_PRD; // Initial duty EPwm1Regs.AQCTLA.bit.CAU = AQ_CLEAR; // TBCTR = CMPA on Down Count:Clear EPwm1Regs.AQCTLA.bit.CAD = AQ_NO_ACTION; // TBCTR = CMPA on Up Count:NO ACTION EPwm1Regs.AQCTLA.bit.ZRO = AQ_SET; // TBCTR = 0 on Up Count:Set EPwm1Regs.AQCTLB.bit.CAU = AQ_NO_ACTION; EPwm1Regs.AQCTLB.bit.CAD = AQ_CLEAR; EPwm1Regs.AQCTLB.bit.ZRO = AQ_SET; EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; //0x3 MODE2 AHC high level delay (AHC)死区双边使能 EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; //0x2 A不反转,B反转 EPwm1Regs.DBCTL.bit.IN_MODE = DBA_RED_DBB_FED; EPwm1Regs.DBRED = EPWM1_DBRED; EPwm1Regs.DBFED = EPWM1_DBFED; } void Init_epwm2(void) { EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up-down EPwm2Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; EPwm2Regs.TBCTL.bit.CLKDIV = TB_DIV1; EPwm2Regs.TBCTL.bit.PHSEN = TB_ENABLE; // Enable phase loading EPwm2Regs.TBCTL.bit.PRDLD = TB_SHADOW; // TBPRD is loaded from its shadow register EPwm2Regs.TBPRD = EPWM_PRD; EPwm2Regs.TBPHS.half.TBPHS = 0; EPwm2Regs.TBCTR = 0x0000; // Clear counter EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; EPwm2Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; // CMPA Shadow mode EPwm2Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // Load on CTR = 0 EPwm2Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW; // CMPA Shadow mode EPwm2Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO; // Load on CTR = 0 EPwm2Regs.CMPA.half.CMPA = 2*D* EPWM_PRD; // Initial duty EPwm2Regs.AQCTLA.bit.CAU = AQ_CLEAR; // TBCTR = CMPA on Down Count:Clear EPwm2Regs.AQCTLA.bit.CAD = AQ_NO_ACTION; // TBCTR = CMPA on Up Count:NO ACTION EPwm2Regs.AQCTLA.bit.ZRO = AQ_SET; // TBCTR = 0 on Up Count:Set EPwm2Regs.AQCTLB.bit.CAU = AQ_NO_ACTION; EPwm2Regs.AQCTLB.bit.CAD = AQ_CLEAR; EPwm2Regs.AQCTLB.bit.ZRO = AQ_SET; EPwm2Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; //0x3 MODE2 AHC high level delay (AHC)死区双边使能 EPwm2Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; //0x2 A不反转,B反转 EPwm2Regs.DBCTL.bit.IN_MODE = DBA_RED_DBB_FED; EPwm2Regs.DBRED = EPWM2_DBRED; EPwm2Regs.DBFED = EPWM2_DBFED; }