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TMS320F28377D: configuring spi in cpu02

Part Number: TMS320F28377D

Hi, I tried to configure SPIA from CPU02, without success.  When I go into debug mode and pause the code, the code gets stuck in the while((HWREGH(CLKCFG_BASE + SYSCTL_O_SYSPLLSTS) &
SYSCTL_SYSPLLSTS_LOCKS) == 0U) Not quite sure why this is happening.
 Before this, all of the functions were already tested on CPU01 and ran brilliantly. 

Here are some snippets of the code in core1:

    Device_init();
    Device_initGPIO();

    // GPIO58 is the SPISIMOA.
    GPIO_setMasterCore(58, GPIO_CORE_CPU2);
    GPIO_setPinConfig(GPIO_58_SPISIMOA);
    GPIO_setDirectionMode(58, GPIO_DIR_MODE_OUT);
    GPIO_setPadConfig(58, GPIO_PIN_TYPE_STD);

    // GPIO59 is the SPISOMIA.
    GPIO_setMasterCore(59, GPIO_CORE_CPU2);
    GPIO_setPinConfig(GPIO_59_SPISOMIA);
    GPIO_setDirectionMode(59, GPIO_DIR_MODE_IN);
    GPIO_setPadConfig(59, GPIO_PIN_TYPE_STD);

    // GPIO60 is the SPICLKA.
    GPIO_setMasterCore(60, GPIO_CORE_CPU2);
    GPIO_setPinConfig(GPIO_60_SPICLKA);
    GPIO_setDirectionMode(60, GPIO_DIR_MODE_IN);
    GPIO_setPadConfig(60, GPIO_PIN_TYPE_STD);

    // GPIO61 is the SPISTEA.
    GPIO_setMasterCore(61, GPIO_CORE_CPU2);
    GPIO_setDirectionMode(61, GPIO_DIR_MODE_OUT);
    GPIO_setPadConfig(61, GPIO_PIN_TYPE_PULLUP);
    GPIO_setQualificationMode(61, GPIO_QUAL_SYNC);

    Interrupt_initModule();
    Interrupt_initVectorTable();

    //
    // grant memory access to cpu2
    //
    MemCfg_setGSRAMMasterSel(MEMCFG_SECT_GS7 | MEMCFG_SECT_GS8 |
                             MEMCFG_SECT_GS9 | MEMCFG_SECT_GS10, MEMCFG_GSRAMMASTER_CPU2);

    //
    // Hand-over the SPI module access to CPU2
    //
    SysCtl_selectCPUForPeripheral(SYSCTL_CPUSEL6_SPI, 1, SYSCTL_CPUSEL_CPU2);