TMS320F280049C: CMPSS用作CBC功能时相关配置的疑问

#define PFC_CBC_VALUE 	7.0f
#define CMPSS_CBC_DACVALUE (PFC_CBC_VALUE / HDL_ADC_DtoReal_IAC)

#define CMPSS_FILTER_PRESCALE 	1
#define CMPSS_FILTER_SAMPLE_WINDOW 9
#define CMPSS_FILTER_THRESH 	5

#define CMPHP6_MUX  CMPX_HP3  	// IPFC1
#define CMPLP6_MUX  CMPX_LP3	// IPFC1

void HAL_CMPSS_Configure(void)
{
	AnalogIO_Init();

	CMPSS_HCFG_CBC(CMPSS6_BASE, CMPSS_CBC_DACVALUE + 2048u);
	CMPSS_LCFG_CBC(CMPSS6_BASE, 2048u - CMPSS_CBC_DACVALUE);
}

void AnalogIO_Init(void)
{
	ASysCtl_selectCMPHPMux(ASYSCTL_CMPHPMUX_SELECT_6, CMPHP6_MUX);
	ASysCtl_selectCMPLPMux(ASYSCTL_CMPLPMUX_SELECT_6, CMPLP6_MUX);
}

void CMPSS_HCFG_CBC(uint32_t base,uint16_t DACvalue)
{
	CMPSS_enableModule(base);

	CMPSS_configHighComparator(base, CMPSS_INSRC_DAC);

	// config the filter para
	CMPSS_configFilterHigh(base,CMPSS_FILTER_PRESCALE,CMPSS_FILTER_SAMPLE_WINDOW,CMPSS_FILTER_THRESH);

	// CTRIP(to EPWM X-BAR) source
	CMPSS_configOutputsHigh(base, CMPSS_TRIP_FILTER);

	CMPSS_configDAC(base, CMPSS_DACVAL_PWMSYNC | CMPSS_DACREF_VDDA | CMPSS_DACSRC_SHDW);
	CMPSS_setDACValueHigh(base, DACvalue);

	CMPSS_setHysteresis(base, 0);
	CMPSS_disableBlanking(base);

	// fifth para 4u: EPWM5
	CMPSS_configRamp(base,4000u,1u,1u,4u,1u);
	
	CMPSS_enableLatchResetOnPWMSYNCHigh(base);
	CMPSS_clearFilterLatchHigh(base);
}

void CMPSS_LCFG_CBC(uint32_t base,uint16_t DACvalue)
{
	
	CMPSS_enableModule(base);
	CMPSS_configLowComparator(base,  CMPSS_INSRC_DAC|CMPSS_INV_INVERTED);
	
	CMPSS_configFilterLow(base,CMPSS_FILTER_PRESCALE,CMPSS_FILTER_SAMPLE_WINDOW,CMPSS_FILTER_THRESH);
	CMPSS_configOutputsLow(base, CMPSS_TRIP_FILTER);

	CMPSS_configDAC(base, CMPSS_DACVAL_PWMSYNC | CMPSS_DACREF_VDDA | CMPSS_DACSRC_SHDW);
	CMPSS_setDACValueLow(base, DACvalue);

	CMPSS_setHysteresis(base, 0);
	CMPSS_disableBlanking(base);
	CMPSS_configRamp(base,4000u,1u,1u,4u,1u);
	
	CMPSS_enableLatchResetOnPWMSYNCLow(base);
	CMPSS_clearFilterLatchLow(base);

}

if (CMPSS_getStatus(CMPSS6_BASE) != 0)
	{
		SvcOBC.SwDebug.DebugVar5++;
	}

static void HAL_PWM_Configure_XBAR(void)
{
//	XBAR_lockEPWM();

	// link cmpss CTRIPH/L to EPWM-XBAR TRIP5, then config EPWM TZ module to link trip5 to EPWM
	XBAR_setEPWMMuxConfig(XBAR_TRIP5, XBAR_EPWM_MUX10_CMPSS6_CTRIPH);
	XBAR_setEPWMMuxConfig(XBAR_TRIP5, XBAR_EPWM_MUX11_CMPSS6_CTRIPL);

	// not inverted	
	XBAR_invertEPWMSignal(XBAR_TRIP5,0);

	// enable cbc mux
	XBAR_enableEPWMMux(XBAR_TRIP5,XBAR_MUX10|XBAR_MUX11|XBAR_MUX12|XBAR_MUX13);

	// need to clear all xbarflags
	XBAR_clearInputFlag(XBAR_INPUT_FLG_CMPSS6_CTRIPL);
	XBAR_clearInputFlag(XBAR_INPUT_FLG_CMPSS6_CTRIPH);
}

static void HAL_PWM_Configure_DC(void)
{
	EPWM_setDigitalCompareEventSource(EPWM5_BASE,EPWM_DC_MODULE_A,EPWM_DC_EVENT_2,EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL);

	EPWM_setDigitalCompareEventSyncMode(EPWM5_BASE,EPWM_DC_MODULE_A,EPWM_DC_EVENT_2,EPWM_DC_EVENT_INPUT_SYNCED);

	// Trip5: CBC
	EPWM_selectDigitalCompareTripInput(EPWM5_BASE,EPWM_DC_TRIP_TRIPIN5,EPWM_DC_TYPE_DCAH);

	EPWM_setTripZoneDigitalCompareEventCondition(EPWM5_BASE,EPWM_TZ_DC_OUTPUT_A2,EPWM_TZ_EVENT_DCXH_HIGH);	

}

static void HAL_PWM_Configure_TZ(void)
{
	EPWM_disableTripZoneAdvAction(EPWM5_BASE);

	//
	//! Set Trip Zone Action.
	//!

	EPWM_setTripZoneAction(EPWM5_BASE, EPWM_TZ_ACTION_EVENT_DCAEVT2, EPWM_TZ_ACTION_LOW);

	EPWM_selectCycleByCycleTripZoneClearEvent(EPWM5_BASE,EPWM_TZ_CBC_PULSE_CLR_CNTR_ZERO);

	EPWM_clearTripZoneFlag(EPWM5_BASE, EPWM_TZ_FLAG_DCAEVT2);


	//
	//! Enables Trip Zone signal.
	//!
	EPWM_enableTripZoneSignals(EPWM5_BASE, EPWM_TZ_SIGNAL_DCAEVT2);

}