TMS320F28377D: 使用EMIF1与FPGA通讯，芯片异常发烫

void InitEMIF(void)
{
    EALLOW;
    //
    // Grab EMIF1 For CPU1
    //
    Emif1ConfigRegs.EMIF1MSEL.all = 0x93A5CE71;

    //
    //Disable Access Protection (CPU_FETCH/CPU_WR/DMA_WR)
    //
    Emif1ConfigRegs.EMIF1ACCPROT0.all = 0x0;

    //
    // Commit the configuration related to protection. Till this bit remains set
    // content of EMIF1ACCPROT0 register can't be changed.
    //
    Emif1ConfigRegs.EMIF1COMMIT.all = 0x1;

    //
    // Lock the configuration so that EMIF1COMMIT register can't be
    // changed any more.
    //
    Emif1ConfigRegs.EMIF1LOCK.all = 0x1;

    EDIS;

    //
    //Configure GPIO pins for EMIF1
    //
//    Uint16 i;

//    for (i=28; i<=52; i++)
//    {
//      if ((i != 42) && (i != 43)&& (i != 28)&& (i != 43))
//      {
//          GPIO_SetupPinMux(i,0,2);
//      }
//    }
//    for (i=63; i<=87; i++)
//    {
//      if (i != 84)
//      {
//          GPIO_SetupPinMux(i,0,2);
//      }
//    }

    GPIO_SetupPinMux(30,0,2);
    GPIO_SetupPinMux(34,0,2);
    GPIO_SetupPinMux(37,0,2);

    GPIO_SetupPinMux(38,0,2);
    GPIO_SetupPinMux(39,0,2);
    GPIO_SetupPinMux(40,0,2);
    GPIO_SetupPinMux(41,0,2);
    GPIO_SetupPinMux(44,0,2);
    GPIO_SetupPinMux(45,0,2);
    GPIO_SetupPinMux(46,0,2);
    GPIO_SetupPinMux(47,0,2);

    GPIO_SetupPinMux(69,0,2);
    GPIO_SetupPinMux(70,0,2);
    GPIO_SetupPinMux(71,0,2);
    GPIO_SetupPinMux(72,0,2);
    GPIO_SetupPinMux(73,0,2);
    GPIO_SetupPinMux(74,0,2);
    GPIO_SetupPinMux(75,0,2);
    GPIO_SetupPinMux(76,0,2);
    GPIO_SetupPinMux(77,0,2);
    GPIO_SetupPinMux(78,0,2);
    GPIO_SetupPinMux(79,0,2);
    GPIO_SetupPinMux(80,0,2);
    GPIO_SetupPinMux(81,0,2);
    GPIO_SetupPinMux(82,0,2);
    GPIO_SetupPinMux(83,0,2);
    GPIO_SetupPinMux(85,0,2);

//    GPIO_SetupPinMux(88,0,3);
//    GPIO_SetupPinMux(89,0,3);
//    GPIO_SetupPinMux(90,0,3);
//    GPIO_SetupPinMux(91,0,3);

    //
    //setup async mode and enable pull-ups for Data pins
    //
//    for (i=69; i<=85; i++)
//    {
//      if (i != 84)
//      {
//          GPIO_SetupPinOptions(i,0,0x31); // GPIO_ASYNC||GPIO_PULLUP
//      }
//    }

    GPIO_SetupPinOptions(69,0,0x31);
    GPIO_SetupPinOptions(70,0,0x31);
    GPIO_SetupPinOptions(71,0,0x31);
    GPIO_SetupPinOptions(72,0,0x31);
    GPIO_SetupPinOptions(73,0,0x31);
    GPIO_SetupPinOptions(74,0,0x31);
    GPIO_SetupPinOptions(75,0,0x31);
    GPIO_SetupPinOptions(76,0,0x31);
    GPIO_SetupPinOptions(77,0,0x31);
    GPIO_SetupPinOptions(78,0,0x31);
    GPIO_SetupPinOptions(79,0,0x31);
    GPIO_SetupPinOptions(80,0,0x31);
    GPIO_SetupPinOptions(81,0,0x31);
    GPIO_SetupPinOptions(82,0,0x31);
    GPIO_SetupPinOptions(83,0,0x31);
    GPIO_SetupPinOptions(85,0,0x31);

    //
    //Configure the access timing for CS2 space
    //
    Emif1Regs.ASYNC_CS2_CR.all =  (  EMIF_ASYNC_ASIZE_16    | // 16Bit Memory
                                                              // Interface
                                     EMIF_ASYNC_TA_1        | // Turn Around time
                                                              // of 2 Emif Clock
                                     EMIF_ASYNC_RHOLD_1     | // Read Hold time
                                                              // of 1 Emif Clock
                                     EMIF_ASYNC_RSTROBE_1   | // Read Strobe time
                                                              // of 1 Emif Clock
                                     EMIF_ASYNC_RSETUP_1    | // Read Setup time
                                                              // of 1 Emif Clock
                                     EMIF_ASYNC_WHOLD_1     | // Write Hold time
                                                              // of 1 Emif Clock
                                     EMIF_ASYNC_WSTROBE_1   | // Write Strobe time
                                                              // of 1 Emif Clock
                                     EMIF_ASYNC_WSETUP_1    | // Write Setup time
                                                              // of 1 Emif Clock
                                     EMIF_ASYNC_EW_DISABLE  | // Extended Wait
                                                              // Disable.
                                     EMIF_ASYNC_SS_DISABLE    // Strobe Select Mode
                                                              // Disable.
                                );
}

#pragma DATA_SECTION(CpuToCla1ADCBuffer,"CpuToCla1MsgRAM");           
volatile Uint32 CpuToCla1ADCBuffer[MEM_BUFFER_SIZE];

#define MEM_BUFFER_SIZE                 22 
    
    Uint16 temp=0;
    Uint16 *dst;
    Uint16 *src;

    dst = (Uint16 *)CpuToCla1ADCBuffer;
    src = (Uint16 *)ASRAM_CS2_START_ADDR;

    for(temp=0;temp<MEM_BUFFER_SIZE*2;temp++)
    {
        *dst++ = *src++;
    }