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ADCSequenceStepConfigure(ADC0_BASE,2,1,ADC_CTL_CH1 | ADC_CTL_IE | ADC_CTL_END );
不知道具体怎么配置的 请TI技术讲解一下,万分感谢!
请查看C:\ti\TivaWare_C_Series-2.1.0.12573\docs\SW-TM4C-DRL-UG-2.1.0.12573.pdf文档中的42页关于ADCSequenceStepConfigure的详细描述。
关于外部参考引脚,你提到的TM4C123G没有说明封装,不同封装,VREF所在的管脚号略有不同。
还有一个问题 就是EK-TM4C123GXL 火箭板上的PB6和PD0是通过一个电感直接连上了 PB7和PD1也是一样的情况,这样两个IO口就短路了,这样设计是为什么呢?
GPIOPinConfigure(GPIO_PB6_M0PWM0); //#define GPIO_PB6_M0PWM0 0x00011804
GPIOPinConfigure(GPIO_PB7_M0PWM1); //#define GPIO_PB7_M0PWM1 0x00011C04
这句代码是什么意思呢 如果我要换成其他的IO输出Pwm,也需要这样配置吗?如果是,那地址又该定义成多少呢?
就拿第一个来说,这个代码是配置PB6口的功能为M0的PWM0输出功能。
换成其他IO也可以,前提是这个IO支持PWM输出。这个值并不是地址,其实是一系列寄存器的值。详细的寄存器的配置过程请结合GPIOPinConfigure的源码进行分析:
//*****************************************************************************
//
//! Configures the alternate function of a GPIO pin.
//!
//! \param ui32PinConfig is the pin configuration value, specified as only one
//! of the \b GPIO_P??_??? values.
//!
//! This function configures the pin mux that selects the peripheral function
//! associated with a particular GPIO pin. Only one peripheral function at a
//! time can be associated with a GPIO pin, and each peripheral function should
//! only be associated with a single GPIO pin at a time (despite the fact that
//! many of them can be associated with more than one GPIO pin). To fully
//! configure a pin, a GPIOPinType*() function should also be called.
//!
//! The available mappings are supplied on a per-device basis in
//! <tt>pin_map.h</tt>. The \b PART_<partno> defines controls which set of
//! defines are included so that they match the device that is being used.
//! For example, \b PART_TM4C129XNCZAD must be defined in order to get the
//! correct pin mappings for the TM4C129XNCZAD device.
//!
//! \note If the same signal is assigned to two different GPIO port
//! pins, the signal is assigned to the port with the lowest letter and the
//! assignment to the higher letter port is ignored.
//!
//! \return None.
//
//*****************************************************************************
void
GPIOPinConfigure(uint32_t ui32PinConfig)
{
uint32_t ui32Base, ui32Shift;
//
// Check the argument.
//
ASSERT(((ui32PinConfig >> 16) & 0xff) < 15);
ASSERT(((ui32PinConfig >> 8) & 0xe3) == 0);
//
// Extract the base address index from the input value.
//
ui32Base = (ui32PinConfig >> 16) & 0xff;
//
// Get the base address of the GPIO module, selecting either the APB or the
// AHB aperture as appropriate.
//
if(HWREG(SYSCTL_GPIOHBCTL) & (1 << ui32Base))
{
ui32Base = g_pui32GPIOBaseAddrs[(ui32Base << 1) + 1];
}
else
{
ui32Base = g_pui32GPIOBaseAddrs[ui32Base << 1];
}
//
// Extract the shift from the input value.
//
ui32Shift = (ui32PinConfig >> 8) & 0xff;
//
// Write the requested pin muxing value for this GPIO pin.
//
HWREG(ui32Base + GPIO_O_PCTL) = ((HWREG(ui32Base + GPIO_O_PCTL) &
~(0xf << ui32Shift)) |
((ui32PinConfig & 0xf) << ui32Shift));
}