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HI,
I encountered a problem where DP83822HF cannot communicate properly when connected to the 100Mbps power grid port. There is no problem with the self loopback test between the FPGA chip and the DP83822HF chip, but normal communication cannot be achieved when adding a 100Mbps grid port connection. The configuration circuit of DP83822HF chip is connected to the 100Mbps power grid port as shown in the following diagram:
Thnak you
Hi ,
Could you please share the schematic file?
Some questions on PHY status:
If DP83822 register dump can be shared, I can help confirm correct PHY config on MDI side.
Thank you,