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大家好、我们正在针对千兆位应用评估 AM263Px 上的 CPSW 外设、但正在努力让第2层 CPSW 示例正常工作。 以下是我的设置:
MCU+ SDK v9.01.00.20
具有180引脚 HSEC 集线站的 AM263Px 控制卡 E2版
在 OSPI 模式下引导、SBL NULL 闪烁
使用 MCU+ SDK 中的"Enet Layer 2 CPSW"示例(无更改、在发布模式下编译)
通过 CCS+JTAG 将二进制文件加载到 controlCARD
controlCARD 和开发计算机之间的直接以太网连接
使用 ColaSoft Packet Builder 发送数据包(ARP 数据包类型的 目标地址设置为与 controlCARD MAC 匹配、源地址 设置为与开发计算机 MAC 匹配)
问题:
运行"Enet Layer 2 CPSW"示例时、在将 ARP 数据包从开发机器发送到 controlCARD (按 MCU+文档使用 ColaSoft Packet Builder)后、CPSW 统计信息始终显示为零。 Wireshark 显示已传输来自 PacketBuilder 的 ARP 数据包、但 开发计算机没有接收到 来自 AM263Px controlCARD 的任何回复。
AM263Px CC 的输出如下:
INFO: Bootloader_socLoadHsmRtFw:82: Device Type : HSFS [HSM_CLIENT] New Client Registered with Client Id = 0 INFO: Bootloader_socLoadHsmRtFw:84: HSMRT Size in Bytes : 23875 INFO: Bootloader_socLoadHsmRtFw:97: hsm runtime firmware load complete ... Starting NULL Bootloader ... INFO: Bootloader_runCpu:155: CPU r5f1-1 is initialized to 400000000 Hz !!! INFO: Bootloader_runCpu:155: CPU r5f1-0 is initialized to 400000000 Hz !!! INFO: Bootloader_runCpu:155: CPU r5f0-1 is initialized to 400000000 Hz !!! [BOOTLOADER_PROFILE] Boot Media : undefined [BOOTLOADER_PROFILE] Boot Image Size : 0 KB [BOOTLOADER_PROFILE] Cores present : [BOOTLOADER PROFILE] System_init : 70us [BOOTLOADER PROFILE] Drivers_open : 40us [BOOTLOADER PROFILE] LoadHsmRtFw : 31939us [BOOTLOADER_PROFILE] SBL Total Time Taken : 56138us NULL Bootloader Execution Complete... INFO: Bootloader_loadSelfCpu:207: CPU r5f0-0 is initialized to 400000000 Hz !!! INFO: Bootloader_runSelfCpu:217: All done, reseting self ... ========================== Layer 2 CPSW Test ========================== Init all peripheral clocks ---------------------------------------------- Create RX tasks ---------------------------------------------- cpsw-3g: Create RX task Open all peripherals ---------------------------------------------- cpsw-3g: Open enet EnetAppUtils_reduceCoreMacAllocation: Reduced Mac Address Allocation for CoreId:0 From 4 To 2 Init all configs ---------------------------------------------- cpsw-3g: init config cpsw-3g: Open port 2 EnetPhy_bindDriver: PHY 0: OUI:080028 Model:0f Ver:03 <-> 'dp83869' : OK PHY 0 is alive Attach core id 0 on all peripherals ---------------------------------------------- cpsw-3g: Attach core cpsw-3g: Open DMA initQs() txFreePktInfoQ initialized with 16 pkts cpsw-3g: Waiting for link up... Cpsw_handleLinkUp: Port 2: Link up: 1-Gbps Full-Duplex MAC Port 2: link up cpsw-3g: MAC port addr: 70:ff:76:1f:60:3e Enet L2 cpsw Menu: 's' - Print statistics 'r' - Reset statistics 'm' - Show allocated MAC addresses 'x' - Stop the test s Print statistics ---------------------------------------------- cpsw-3g - Port 2 statistics --------------------------------
我验证了 controlCARD 上的 SW14/15/16均处于默认的"关闭"位置、该位置应将 CPSW RGMII2连接到板载 PHY。
有什么建议吗?
周老师、您好!
我将尝试在最后复制相同的内容、并在明天之前通过一些更新与您联系。
此致、
Shaunak
周老师、您好!
当您尝试打印统计信息时、您看不到任何端口统计信息是否正确? 您能否帮助我验证您是否看到某些打印件、如随附的屏幕截图中所示。
此致、
Shaunak
周老师、您好!
复制问题时的更新:
我尝试使用相同的器件、SDK 版本、引导模式和上述所有配置来复制该场景。 I
测试设置:
如果您看到" " 提示未打印统计信息、请您尝试输入 "r" (重置统计信息)并再次尝试打印统计信息?
如果我能为您提供任何帮助、请告诉我。
此致、
Shaunak
我确实看到 controlCARD 上 RJ45连接器上的两个灯。 当我发送数据包时、左指示灯为琥珀色(1000BASE-T)、右指示灯呈绿色闪烁。 这看起来像是某种软件配置。 但我没有找到任何明显的原因。
从"Scripts"->"CPSW Statistics Print"->"cpsw_3G_statsprint_nonzero"(在运行示例并发送数据包之后):
Cortex_R5_0: GEL Output: STATS Cortex_R5_0: GEL Output: -------------------------------- Cortex_R5_0: GEL Output: PORT0 STATS Cortex_R5_0: GEL Output: -------------------------------- Cortex_R5_0: GEL Output: -------------------------------- Cortex_R5_0: GEL Output: PORT1 STATS Cortex_R5_0: GEL Output: -------------------------------- Cortex_R5_0: GEL Output: -------------------------------- Cortex_R5_0: GEL Output: PORT2 STATS Cortex_R5_0: GEL Output: --------------------------------
终于找到了。 controlCARD 上的 SW15位于错误位置。
似乎 SW15被安装在与 SW14和 SW16相反的方向上。 这意味着 SW14/16必须处于"下"位置(OFF)、而 SW15必须处于"上"位置(OFF)。
现在按预期获得统计数据:
========================== Layer 2 CPSW Test ========================== Init all peripheral clocks ---------------------------------------------- Create RX tasks ---------------------------------------------- cpsw-3g: Create RX task Open all peripherals ---------------------------------------------- cpsw-3g: Open enet EnetAppUtils_reduceCoreMacAllocation: Reduced Mac Address Allocation for CoreId:0 From 4 To 2 Init all configs ---------------------------------------------- cpsw-3g: init config cpsw-3g: Open port 2 EnetPhy_bindDriver:1828 PHY 0 is alive Attach core id 0 on all peripherals ---------------------------------------------- cpsw-3g: Attach core cpsw-3g: Open DMA initQs() txFreePktInfoQ initialized with 16 pkts cpsw-3g: Waiting for link up... Cpsw_handleLinkUp:1629 MAC Port 2: link up cpsw-3g: MAC port addr: 70:ff:76:1f:60:3e Enet L2 cpsw Menu: 's' - Print statistics 'r' - Reset statistics 'm' - Show allocated MAC addresses 'x' - Stop the test s Print statistics ---------------------------------------------- rxGoodFrames = 328 rxOctets = 35460 txGoodFrames = 328 txBcastFrames = 19 txMcastFrames = 305 txOctets = 35460 octetsFrames64 = 122 octetsFrames65to127 = 394 octetsFrames128to255 = 128 octetsFrames256to511 = 12 netOctets = 70920 txPri[0] = 328 txPriBcnt[0] = 35460 cpsw-3g - Port 2 statistics -------------------------------- rxGoodFrames = 328 rxBcastFrames = 19 rxMcastFrames = 305 rxOctets = 35460 txGoodFrames = 328 txOctets = 35460 octetsFrames64 = 122 octetsFrames65to127 = 394 octetsFrames128to255 = 128 octetsFrames256to511 = 12 netOctets = 70920 aleUnknownUcast = 1 aleUnknownUcastBcnt = 64 aleUnknownBcast = 1 aleUnknownBcastBcnt = 346 txPri[0] = 328 txPriBcnt[0] = 35460