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工具与软件:
大家好!
我在 TMS320F28069微控制器上执行软件复位时遇到问题。 我在 TMS320F28027F 上具有可以正常工作的复位过程、但当我尝试在 TMS320F28069上使用相同的方法时、会导致问题。
问题: 在 TMS320F28069上执行软件复位后、处理器无法重新启动。 即使硬件复位按钮也停止工作、唯一恢复方法是完全关闭电源、然后再打开器件电源。
void resetDevice(HAL_Handle halHandle) { WDOG_disable(halHandle->wdogHandle); EALLOW; halHandle->wdogHandle->SCSR = 0x0; halHandle->wdogHandle->WDCR = 0x0; EDIS; WDOG_enable(halHandle->wdogHandle); }
这个代码在 TMS320F28027F 上运行良好、但是它会导致 TMS320F28069挂起。
问题: 为什么 TMS320F28027F 上运行的软件复位在 TMS320F28069上不能正常运行? 我如何正确地为 TMS320F28069实现软件复位以防止其挂起?
我非常感谢您提供任何建议或建议!
GPIO37 = 1 и GPIO34 = 1。
LAUNCHXL-F28069M
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谢谢!
Andrew。
Andrew、您好!
当看门狗触发 XRSn 时、它会经历引导周期并根据所选的引导模式返回到应用程序代码。
如果在您对闪存进行编程后将引导模式设置为闪存、则它将在 WD XRSn 触发时跳转到代码。
如果连接了调试器、则需要设置仿真引导模式以跳 转到入口点、如下面的流程图所示
谢谢
问题没有得到解决;问题变得更加严重。 让我更详细地说明一下:
我 使用 MotorWare 18与 LAUNCHXL-F28069M 和 BOOSTXL-DRV8305EVM 配合使用。 未安装 JP1和 JP2。 在调试器下工作时、我使用引导设置:开、开、开。 在此模式下、一切均正常运行、我可以成功调试程序。
调试后、我切换到闪存引导模式。 引导设置为:On (开)、On (开)、Off (关)。 我打开系统电源、程序开始运行、我可以通过闪烁的 LED 进行确认。 但我无法控制电机。 通过 CAN 进行通信时工作正常。
如果我按下"Reset"按钮或执行软件复位、一切都开始正常工作、包括电机控制。 但在首次上电后、电机控制便无法正常工作。
对于可能导致此问题的原因、我希望提供任何建议。
Andrew。
PS:我有3个 LAUNCHXL-F28069M。 相同。
您能否在进行电机控制的代码部分放置 GPIO 切换开关、您需要查看代码的哪个部分会遇到通过执行 XRSn 来解决的问题。
谢谢
LED 控制位于 MAIN_ISR 中。 主域中的 CAN 通信。
我不确定我的问题是否与 cmd 文件有关。 这是我的命令。
// FILE: F28069M.cmd // // TITLE: Linker Command File For F28069M + Flash28_API Device MEMORY { PAGE 0 : /* Program Memory */ /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */ RAML0_1 : origin = 0x008000, length = 0x000C00 /* on-chip RAM block L0 and L1 */ OTP : origin = 0x3D7800, length = 0x000400 /* on-chip OTP */ //FLASHH : origin = 0x3D8000, length = 0x004000 /* on-chip FLASH */ FLASHG : origin = 0x3DC000, length = 0x004000 /* on-chip FLASH */ FLASHF : origin = 0x3E0000, length = 0x004000 /* on-chip FLASH */ FLASHE : origin = 0x3E4000, length = 0x004000 /* on-chip FLASH */ FLASHA_D : origin = 0x3E8000, length = 0x00FF80 /* on-chip FLASH */ //FLASHC : origin = 0x3EC000, length = 0x004000 /* on-chip FLASH */ //FLASHA_B : origin = 0x3EC000, length = 0x007F80 /* on-chip FLASH */ CSM_RSVD : origin = 0x3F7F80, length = 0x000076 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */ BEGIN : origin = 0x3F7FF6, length = 0x000002 /* Part of FLASHA. Used for "boot to Flash" bootloader mode. */ CSM_PWL_P0 : origin = 0x3F7FF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */ FPUTABLES : origin = 0x3FD590, length = 0x0006A0 /* FPU Tables in Boot ROM */ IQTABLES : origin = 0x3FDC30, length = 0x000B50 /* IQ Math Tables in Boot ROM */ IQTABLES2 : origin = 0x3FE780, length = 0x00008C /* IQ Math Tables in Boot ROM */ IQTABLES3 : origin = 0x3FE80C, length = 0x0000AA /* IQ Math Tables in Boot ROM */ ROM : origin = 0x3FF3B0, length = 0x000C10 /* Boot ROM */ RESET : origin = 0x3FFFC0, length = 0x000002 /* part of boot ROM */ VECTORS : origin = 0x3FFFC2, length = 0x00003E /* part of boot ROM */ PAGE 1 : /* Data Memory */ /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */ /* Registers remain on PAGE1 */ BOOT_RSVD : origin = 0x000000, length = 0x000050 /* Part of M0, BOOT rom will use this for stack */ RAMM0 : origin = 0x000050, length = 0x0003B0 /* on-chip RAM block M0 */ RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */ RAML2_3 : origin = 0x008C00, length = 0x001400 /* on-chip RAM block L2 */ RAML4 : origin = 0x00A000, length = 0x002000 /* on-chip RAM block L4 */ RAML5 : origin = 0x00C000, length = 0x002000 /* on-chip RAM block L5 */ RAML6 : origin = 0x00E000, length = 0x002000 /* on-chip RAM block L6 */ RAML7 : origin = 0x010000, length = 0x002000 /* on-chip RAM block L7 */ RAML8 : origin = 0x012000, length = 0x001800 /* on-chip RAM block L8. From 0x13800 to 0x14000 is reserved for InstaSPIN */ USB_RAM : origin = 0x040000, length = 0x000800 /* USB RAM */ ECANA : origin = 0x006000, length = 0x000040 /* eCAN-A control and status registers */ ECANA_LAM : origin = 0x006040, length = 0x000040 /* eCAN-A local acceptance masks */ ECANA_MOTS : origin = 0x006080, length = 0x000040 /* eCAN-A message object time stamps */ ECANA_MOTO : origin = 0x0060C0, length = 0x000040 /* eCAN-A object time-out registers */ ECANA_MBOX : origin = 0x006100, length = 0x000100 /* eCAN-A mailboxes */ FLASHH : origin = 0x3D8000, length = 0x004000 /* on-chip FLASH */ } SECTIONS { /*Flash28_API: // Applicable only when API is not in BootROM { -lFlash2806x_API_wFPU_Library.lib(.econst) -lFlash2806x_API_wFPU_Library.lib(.text) } LOAD = FLASHF, RUN = RAML4_5, LOAD_START(_Flash28_API_LoadStart), LOAD_END(_Flash28_API_LoadEnd), RUN_START(_Flash28_API_RunStart), PAGE = 0*/ /* Allocate program areas: */ .cinit : > FLASHA_D, PAGE = 0 .pinit : > FLASHA_D, PAGE = 0 .text : > FLASHA_D, PAGE = 0 codestart : > BEGIN, PAGE = 0 ramfuncs : { -lFlash2806x_API_wFPU_Library.lib(.econst) -lFlash2806x_API_wFPU_Library.lib(.text) } LOAD = FLASHE, RUN = RAML0_1, /*RAML0_1*/ LOAD_START(_RamfuncsLoadStart), LOAD_END(_RamfuncsLoadEnd), RUN_START(_RamfuncsRunStart), PAGE = 0 csmpasswds : > CSM_PWL_P0, PAGE = 0 csm_rsvd : > CSM_RSVD, PAGE = 0 /* Allocate uninitalized data sections: */ .stack : > RAMM0, PAGE = 1 .ebss : > RAML2_3, PAGE = 1 .esysmem : > RAML2_3, PAGE = 1 /* Initalized sections to go in Flash */ /* For SDFlash to program these, they must be allocated to page 0 */ .econst : > FLASHA_D, PAGE = 0 .switch : > FLASHA_D, PAGE = 0 /* Allocate IQ math areas: */ IQmath : > FLASHA_D, PAGE = 0 /* Math Code */ IQmathTables : > IQTABLES, PAGE = 0, TYPE = NOLOAD /* Allocate FPU math areas: */ FPUmathTables : > FPUTABLES, PAGE = 0, TYPE = NOLOAD DMARAML5 : > RAML5, PAGE = 1 DMARAML6 : > RAML6, PAGE = 1 DMARAML7 : > RAML7, PAGE = 1 DMARAML8 : > RAML8, PAGE = 1 /* Uncomment the section below if calling the IQNexp() or IQexp() functions from the IQMath.lib library in order to utilize the relevant IQ Math table in Boot ROM (This saves space and Boot ROM is 1 wait-state). If this section is not uncommented, IQmathTables2 will be loaded into other memory (SARAM, Flash, etc.) and will take up space, but 0 wait-state is possible. */ /* IQmathTables2 : > IQTABLES2, PAGE = 0, TYPE = NOLOAD { IQmath.lib<IQNexpTable.obj> (IQmathTablesRam) } */ /* Uncomment the section below if calling the IQNasin() or IQasin() functions from the IQMath.lib library in order to utilize the relevant IQ Math table in Boot ROM (This saves space and Boot ROM is 1 wait-state). If this section is not uncommented, IQmathTables3 will be loaded into other memory (SARAM, Flash, etc.) and will take up space, but 0 wait-state is possible. */ /* IQmathTables3 : > IQTABLES3, PAGE = 0, TYPE = NOLOAD { IQmath.lib<IQNasinTable.obj> (IQmathTablesRam) } */ /* .reset is a standard section used by the compiler. It contains the */ /* the address of the start of _c_int00 for C Code. */ /* When using the boot ROM this section and the CPU vector */ /* table is not needed. Thus the default type is set here to */ /* DSECT */ .reset : > RESET, PAGE = 0, TYPE = DSECT vectors : > VECTORS, PAGE = 0, TYPE = DSECT persistent_memory : > FLASHH, PAGE = 1 } /* //=========================================================================== // End of file. //=========================================================================== */