280049c CLA影响PWM中断运行

user6154541

我使用了一个pwm中断，用pwm2触发，不触发cla时运行时间为400ns，触发cla后pwm中断运行时间是13us，感觉是cla影响了pwm中断。pwm中断配置如下：

        EALLOW;
        EPwm2Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;
        EPwm2Regs.ETSEL.bit.INTEN = 1;
        EPwm2Regs.ETPS.bit.INTPRD = 1;
        EDIS;

    EALLOW; //
    PieVectTable.EPWM2_INT=&EPWM1ISR;
    EDIS;

    IER |= M_INT3; // Enable CPU Interrupt 3
    PieCtrlRegs.PIEACK.bit.ACK3   = 1;
    PieCtrlRegs.PIEIER3.bit.INTx2 = 1;

cla配置如下：

void CLA_configClaMemory(void)
{
#define _FLASH

extern uint32_t Cla1ProgRunStart, Cla1ProgLoadStart, Cla1ProgLoadSize,Cla1ProgLoadEnd;

    EALLOW;
#ifdef _FLASH
    //
    // Copy over code from FLASH to RAM
    //
//    MemCopy(&Cla1ProgLoadStart, &Cla1ProgLoadEnd, &Cla1ProgRunStart);
//        asm("   RPT #3 || NOP");
    memcpy((uint32_t *)&Cla1ProgRunStart, (uint32_t *)&Cla1ProgLoadStart,
            (uint32_t)&Cla1ProgLoadSize);
#endif //_FLASH

    //
    // Initialize and wait for CLA1ToCPUMsgRAM
    //
    MemCfgRegs.MSGxINIT.bit.INIT_CLA1TOCPU = 1;
    while(MemCfgRegs.MSGxINITDONE.bit.INITDONE_CLA1TOCPU != 1){};

    //
    // Initialize and wait for CPUToCLA1MsgRAM
    //
    MemCfgRegs.MSGxINIT.bit.INIT_CPUTOCLA1 = 1;
    while(MemCfgRegs.MSGxINITDONE.bit.INITDONE_CPUTOCLA1 != 1){};

    //
    // Select LS4RAM and LS5RAM to be the programming space for the CLA
    // First configure the CLA to be the master for LS4 and LS5 and then
    // set the space to be a program block
    //
    MemCfgRegs.LSxMSEL.bit.MSEL_LS0 = 1;
    MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS0 = 1;
    MemCfgRegs.LSxMSEL.bit.MSEL_LS1 = 1;
    MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS1 = 0;

EDIS;
}

//
// CLA_initCpu1Cla1 - Initialize CLA1 task vectors and end of task interrupts
//
void CLA_initCpu1Cla1(void)
{
    //
    // Compute all CLA task vectors
    // On Type-1 CLAs the MVECT registers accept full 16-bit task addresses as
    // opposed to offsets used on older Type-0 CLAs
    //
    EALLOW;
    Cla1Regs.MVECT1 = (uint16_t)(&Cla1Task1);
    Cla1Regs.MVECT2 = (uint16_t)(&Cla1Task2);
    Cla1Regs.MVECT3 = (uint16_t)(&Cla1Task3);
    Cla1Regs.MVECT4 = (uint16_t)(&Cla1Task4);
    Cla1Regs.MVECT5 = (uint16_t)(&Cla1Task5);
    Cla1Regs.MVECT6 = (uint16_t)(&Cla1Task6);
    Cla1Regs.MVECT7 = (uint16_t)(&Cla1Task7);
    Cla1Regs.MVECT8 = (uint16_t)(&Cla1Task8);

    //
    // Enable the IACK instruction to start a task on CLA in software
    // for all 8 CLA tasks. Also, globally enable all 8 tasks (or a
    // subset of tasks) by writing to their respective bits in the
    // MIER register
//    EALLOW;
    Cla1Regs.MCTL.bit.IACKE = 1;
    Cla1Regs.MIER.all = (M_INT8 | M_INT1);

//
DmaClaSrcSelRegs.CLA1TASKSRCSEL1.bit.TASK1 = CLA_TRIG_EPWM3INT;

}

请问是哪里出了问题，导致cla影响了pwm中断的正常运行？？非常感谢！！

5 年多前

0 Susan Yang 5 年多前

TI__Guru**** 252096 points

所以您现在是EPWM3触发CLA task？ PieVectTable.EPWM2_INT=&EPWM1ISR;

您的EPWM3是如何配置的呢？能否简要说一下您的程序？

0 user6154541 5 年多前回复 Susan Yang

Prodigy 250 points

您好，我用EPWM3触发cla task1，软件强制触发task8一次。关于cla的配置如下：
Cla1ForceTask8();
EPwm3Regs.ETSEL.bit.INTSEL = ET_CTR_PRD; // Select INT on Zero event
EPwm3Regs.ETSEL.bit.INTEN = 1; // 使能Enable INT,外设级中断允许
EPwm3Regs.ETPS.bit.INTPRD = 1;//ET_1ST; // Generate INT on 1rd event

void CLA_configClaMemory(void)
{
#define _FLASH

// extern uint32_t Cla1ProgRunStart, Cla1ProgLoadStart, Cla1ProgLoadSize,Cla1ProgLoadEnd;

EALLOW;
#ifdef _FLASH
//
// Copy over code from FLASH to RAM
//
// MemCopy(&Cla1ProgLoadStart, &Cla1ProgLoadEnd, &Cla1ProgRunStart);
// asm(" RPT #3 || NOP");
memcpy((uint32_t *)&Cla1ProgRunStart, (uint32_t *)&Cla1ProgLoadStart,
(uint32_t)&Cla1ProgLoadSize);
#endif //_FLASH

//
// Initialize and wait for CLA1ToCPUMsgRAM
//
MemCfgRegs.MSGxINIT.bit.INIT_CLA1TOCPU = 1;
while(MemCfgRegs.MSGxINITDONE.bit.INITDONE_CLA1TOCPU != 1){};

//
// Initialize and wait for CPUToCLA1MsgRAM
//
MemCfgRegs.MSGxINIT.bit.INIT_CPUTOCLA1 = 1;
while(MemCfgRegs.MSGxINITDONE.bit.INITDONE_CPUTOCLA1 != 1){};

//
// Select LS4RAM and LS5RAM to be the programming space for the CLA
// First configure the CLA to be the master for LS4 and LS5 and then
// set the space to be a program block
//
MemCfgRegs.LSxMSEL.bit.MSEL_LS0 = 1;
MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS0 = 1;
MemCfgRegs.LSxMSEL.bit.MSEL_LS1 = 1;
MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS1 = 0;

EDIS;
}

//
// CLA_initCpu1Cla1 - Initialize CLA1 task vectors and end of task interrupts
//
void CLA_initCpu1Cla1(void)
{
extern Uint16 Cla1Prog_Start;
//
// Compute all CLA task vectors
// On Type-1 CLAs the MVECT registers accept full 16-bit task addresses as
// opposed to offsets used on older Type-0 CLAs
//
EALLOW;
Cla1Regs.MVECT1 = (uint16_t)(&Cla1Task1);
Cla1Regs.MVECT2 = (uint16_t)(&Cla1Task2);
Cla1Regs.MVECT3 = (uint16_t)(&Cla1Task3);
Cla1Regs.MVECT4 = (uint16_t)(&Cla1Task4);
Cla1Regs.MVECT5 = (uint16_t)(&Cla1Task5);
Cla1Regs.MVECT6 = (uint16_t)(&Cla1Task6);
Cla1Regs.MVECT7 = (uint16_t)(&Cla1Task7);
Cla1Regs.MVECT8 = (uint16_t)(&Cla1Task8);

// Enable the IACK instruction to start a task on CLA in software
// for all 8 CLA tasks. Also, globally enable all 8 tasks (or a
// subset of tasks) by writing to their respective bits in the
// MIER register
// EALLOW;
Cla1Regs.MCTL.bit.IACKE = 1;
Cla1Regs.MIER.all = (M_INT8 | M_INT1);

//
DmaClaSrcSelRegs.CLA1TASKSRCSEL1.bit.TASK1 = CLA_TRIG_EPWM3INT;
EDIS;

}

0 user6154541 5 年多前回复 user6154541

Prodigy 250 points

我用EPWM2触发PWM中断EPWM1_ISR,具体配置如下：
EPwm2Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;
EPwm2Regs.ETSEL.bit.INTEN = 1;
EPwm2Regs.ETPS.bit.INTPRD = 1;

EALLOW; //
PieVectTable.EPWM2_INT=&EPWM1ISR;
EDIS;

IER |= M_INT3; // Enable CPU Interrupt 3
PieCtrlRegs.PIEACK.bit.ACK3 = 1;
PieCtrlRegs.PIEIER3.bit.INTx2 = 1;