Part Number: TMS320F28075
Other Parts Discussed in Thread: C2000WARE
你好，TI的技术专家
我使用的MCU是TMS320F28075PZP(100PIN），测试MCD不通过，使用的是C2000Ware库，版本C2000Ware_4_02_00_00,问题详细描述在英文技术论坛已发，请参考
目前的问题是，设置了OSCOFF(SysCtl_disconnectMCDClockSource();就是这条语句)，MCDCR寄存器的bit0，即MCDSTS flag没有变1，也就是说没有检查到时钟丢失。用的是库里面的示例程序。
//#############################################################################
//
// FILE: sta_main.c
//
// TITLE: Self Test Application Main source
//
//#############################################################################
// $TI Release: F2807x Diagnostic Library v1.00.02.00 $
// $Release Date: Mon Dec 18 17:00:32 CST 2017 $
// $Copyright:
// Copyright (C) 2016-2017 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//#############################################################################
//
// Included files for device configuration
//
#include <stdbool.h>
#include <stdint.h>
#include <string.h>
#include "driverlib.h"
#include "device.h"
#include "F2807x_device.h"
#include "F021_F2837xD_C28x.h"
//
// Included files for test-infrastructure.
//
#include "sta_timer.h"
#include "sta_tests.h"
#include "sta_comm.h"
//
// Globals
//
int16_t enableErrorInject;
int16_t enableReset;
volatile bool nmiISRFlag = false;
uint16_t nmiStatus = 0U;
bool mcdDetect = false;
uint32_t result = 1;
uint32_t fail = 0U;
//
// Prototypes
//
void STA_Main_configXCLKOut(void);
Fapi_StatusType STA_Main_initFlashAPI(void);
#ifdef _FLASH
// These are defined by the linker (see device linker command file)
extern uint16_t RamfuncsLoadStart;
extern uint16_t RamfuncsLoadSize;
extern uint16_t RamfuncsRunStart;
extern uint16_t HwbistLoadStart;
extern uint16_t HwbistLoadSize;
extern uint16_t HwbistRunStart;
#endif
//
// Function Prototypes
//
__interrupt void nmi_isr(void);
//
// Main
//
void main(void)
{
#ifdef _FLASH
memcpy(&HwbistRunStart, &HwbistLoadStart, (size_t)&HwbistLoadSize);
#endif
unsigned char *msg;
uint16_t testIndex = 0;
Fapi_StatusType statusFlashAPI = Fapi_Status_Success;
enableErrorInject = 0;
uint16_t nmiWatchdogPeriod = 0x1000;
//
// Configure PLL, disable WD, enable peripheral clocks.
//
Device_init();
//
// Disable pin locks and enable internal pull-ups.
//
Device_initGPIO();
//***********************************
//added by yang for debug
GPIO_setPinConfig(GPIO_43_GPIO43);
GPIO_setDirectionMode(43,GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(43,GPIO_PIN_TYPE_STD);
GPIO_writePin(43,1);
//************************************
//
// Put watchdog in interrupt mode.
//
SysCtl_setWatchdogMode(SYSCTL_WD_MODE_INTERRUPT);
// statusFlashAPI = STA_Main_initFlashAPI();
// if(statusFlashAPI != Fapi_Status_Success)
// {
// ESTOP0;
// }
//
// Disable global interrupts.
//
DINT;
//
// Initialize interrupt controller and vector table.
//
Interrupt_initModule();
Interrupt_initVectorTable();
SysCtl_clearAllNMIFlags();
Interrupt_register(INT_NMI, &nmi_isr);
SysCtl_setNMIWatchdogPeriod(nmiWatchdogPeriod);
//
// Enabling the NMI global interrupt (typically already enabled by boot ROM
// or GEL file).
//
EALLOW;
HWREGH(NMI_BASE + NMI_O_CFG) |= NMI_CFG_NMIE;
EDIS;
Interrupt_enable(INT_NMI);
EINT;
ERTM;
if(SysCtl_getClock(DEVICE_OSCSRC_FREQ) != DEVICE_SYSCLK_FREQ)
{
fail++;
}
SysCtl_enableMCD();
SysCtl_disconnectMCDClockSource();
fail=3;
while(nmiISRFlag != true)
{
fail++;
}
fail=5;
// A missing clock was detected.
//
if(mcdDetect != true)
{
fail++;
}
// Check if the NMI triggered was due to a clock failure.
//
if((nmiStatus & SYSCTL_NMI_CLOCKFAIL) != SYSCTL_NMI_CLOCKFAIL)
{
fail++;
}
// Check the PLL System clock after the Missing clock detection
// is simulated. It should be equal to INTOSC1(10Mhz).
//
if(SysCtl_getClock(DEVICE_OSCSRC_FREQ) != SYSCTL_DEFAULT_OSC_FREQ)
{
fail++;
}
// To lock the PLL after missing clock detection, we first explicitly
// switch the clock source to INTOSC1, reset the missing clock detect
// circuit, and then re-lock the PLL.
//
// Configure oscillator source to INTOSC1.
//
SysCtl_selectOscSource(SYSCTL_OSCSRC_OSC1);
SysCtl_connectMCDClockSource();
// Reset the missing clock detection logic after clock failure.
//
SysCtl_resetMCD();
// Set up PLL control and clock dividers using the original clock source.
//
SysCtl_setClock(DEVICE_SETCLOCK_CFG);
// Check the system clock after the missing clock detection is cleared
// and handled using INTOSC1 as clock source.
//
if(SysCtl_getClock(DEVICE_OSCSRC_FREQ) != DEVICE_SYSCLK_FREQ)
{
fail++;
}
// Status of a successful handling of missing clock detection.
//
if(fail != 0U)
{
result = 1; //fail
// GPIO_writePin(43,0);
}
else
{
result = 0; //pass
// GPIO_writePin(43,0);
}
while(1);
//
// Debug
//
// STA_Main_configXCLKOut();
//
// Configure SCI A as the main communication port
//
// STA_Comm_configSCIA();
//
// Configure Timer 0 as the main time-out timer
//
// STA_Timer_config(4000U);
//#if STA_UTIL_PROFILE
// STA_Util_configProfiler(CPUTIMER1_BASE);
//#endif
//
// Enable Global Interrupt (INTM) and real time interrupt (DBGM)
//
// EINT;
// ERTM;
//
// Send starting message.
//
// msg = "\r\n\n\nBegin Test\0";
// STA_Comm_transmitData(msg);
/* for(;;)
{
if(STA_Timer_isTimedOut())
{
if(enableErrorInject)
{
STA_Tests_injectErrorEnable();
}
else
{
STA_Tests_injectErrorDisable();
}
if(enableReset)
{
STA_Tests_enableReset();
}
else
{
STA_Tests_disableReset();
}
STA_Comm_transmitData(
STA_Tests_testDevice(STA_Tests_testArray[testIndex++]));
if(testIndex >= STA_TESTS_NUMBERS)
{
testIndex = 0U;
}
STA_Timer_restart();
}
} */
}
//
// STA_Main_configXCLKOut(void)
//
void STA_Main_configXCLKOut(void)
{
// Configure GPIO 73 as SYSCLK out
GPIO_setPadConfig(73,GPIO_PIN_TYPE_STD);
GPIO_setPinConfig(GPIO_73_XCLKOUT);
// Clock source is SYSCLK
SysCtl_selectClockOutSource(SYSCTL_CLOCKOUT_SYSCLK);
EALLOW;
// XCLOCK out = clock source /8
HWREG(CLKCFG_BASE + SYSCTL_O_XCLKOUTDIVSEL) = 3U;
EDIS;
}
//
// STA_Main_initFlashAPI(void)
//
#pragma CODE_SECTION(STA_Main_initFlashAPI, ".TI.ramfunc");
Fapi_StatusType STA_Main_initFlashAPI(void)
{
Fapi_StatusType returnStatus;
//
// Disable ECC when initializing the Flash API
//
Flash_disableECC(FLASH0ECC_BASE);
EALLOW;
//
// This function is required to initialize the Flash API based on System
// frequency before any other Flash API operation can be performed
//
returnStatus = Fapi_initializeAPI(F021_CPU0_BASE_ADDRESS,
DEVICE_SYSCLK_FREQ / 1000000U);
EDIS;
return(returnStatus);
}
//
// nmiISR - The interrupt service routine called when the NMI
// is generated on clock failure detection.
//
__interrupt void nmi_isr(void)
{
nmiISRFlag = true;
mcdDetect = SysCtl_isMCDClockFailureDetected();
nmiStatus = SysCtl_getNMIFlagStatus();
SysCtl_clearAllNMIFlags();
GPIO_writePin(43,0);
}
//
// End of File
//
