TMS320F280033: 调用Fapi_issueBankEraseCommand时可能因为错误掩码导致FSM永不退出的问题

u32CurrentAddress = Bzero_Sector8_start;
oReturnCheck = Fapi_issueBankEraseCommand((uint32 *)u32CurrentAddress, 0x001F);
// Wait until FSM is done with bank erase operation
while (Fapi_checkFsmForReady() != Fapi_Status_FsmReady)
{
//
// Initialize the Erase Pulses to zero after issuing max pulses
//
if(HWREG(FLASH0CTRL_BASE + FLASH_O_ACC_EP) > MAX_ERASE_PULSE)
{
EALLOW;
//
// Enable Flash Optimization
//
HWREG(FLASH0CTRL_BASE + FLASH_O_OPT) = OPT_ENABLE;
HWREG(FLASH0CTRL_BASE + FLASH_O_ERA_PUL) =
HWREG(FLASH0CTRL_BASE + FLASH_O_ERA_PUL) &
~(uint32_t)FLASH_ERA_PUL_MAX_ERA_PUL_M;
//
// Disable Flash Optimization
//
HWREG(FLASH0CTRL_BASE + FLASH_O_OPT) = OPT_DISABLE;
EDIS;
}
}

#define FLASH0CTRL_BASE           0x0005F800U
#define FLASH0ECC_BASE            0x0005FB00U

//
// FMC Registers, Masks and Values
//
#define FLASH_O_ACC_EP           0x148U    // Flash Accumulated Erase Pulses
#define FLASH_O_ERA_PUL          0x136U    // Flash Max Erase Pulses
#define FLASH_O_OPT              0x144U    // Flash Optimization

#define FLASH_ERA_PUL_MAX_ERA_PUL_M      0xFFFU  // Flash Max Erase Pulses Mask
#define OPT_ENABLE                       0x5U    // Flash Optimization Enable
#define OPT_DISABLE                      0x2U    // Flash Optimization Disable
#define MAX_ERASE_PULSE                  0x7D0U  // Flash Max Erase Pulses

struct FLASH_CTRL_REGS {
    union   FRDCNTL_REG                      FRDCNTL;                      // Flash Read Control Register
    Uint16                                   rsvd1[28];                    // Reserved
    union   FBAC_REG                         FBAC;                         // Flash Bank Access Control Register
    union   FBFALLBACK_REG                   FBFALLBACK;                   // Flash Bank Fallback Power Register
    union   FBPRDY_REG                       FBPRDY;                       // Flash Bank Pump Ready Register
    union   FPAC1_REG                        FPAC1;                        // Flash Pump Access Control Register 1
    union   FPAC2_REG                        FPAC2;                        // Flash Pump Access Control Register 2
    Uint16                                   rsvd2[2];                     // Reserved
    union   FMSTAT_REG                       FMSTAT;                       // Flash Module Status Register
    Uint16                                   rsvd3[340];                   // Reserved
    union   FRD_INTF_CTRL_REG                FRD_INTF_CTRL;                // Flash Read Interface Control Register
};