MSP430FR2433的TA0R计数器问题

您的源码是不是不全？编译后有很多未定义

请给出完整代码，我会在测试后回复

我测试了下例程 MSP430FR243x Demo - Timer0_A3, PWM TA0.1-2, Up Mode, 32KHz ACLK ，可以计数的·

测试的是 MSP430F55xx_ta0_04.c                              Timer0_A5, Toggle P1.0, Overflow ISR, 32kHz ACLK

也是可以计数的。请您使用例程测试一下

Susan:
我拿例程测试时单步执行还是无法计数；您可以将您测试例程发我一下。另外我测试程序如下。

main()
{
  _DINT(); 
  WDTCTL = WDTPW | WDTHOLD;

  PortInit();  
  
  Ucs_Init_16M();
  
  TimerA0CounterSetup();

while(1)  
  {
    __bis_SR_register(LPM3_bits | GIE);     // Enter LPM3

    WDTCTL = WDTPW | WDTCNTCL | WDTSSEL0_L | WDTIS_2;

    UCA1IE |= UCRXIE;    
    
    APP_RTCPro_Delay_ms(2);
    
    unsigned int uiTemp=0;
    unsigned int uiTranceiver=0;

    uiTranceiver=TA0R;
    do
    {
      __bis_SR_register(LPM3_bits | GIE);     // Enter LPM3

      if(TA0R>=uiTranceiver)uiTemp=TA0R;
      else uiTemp=TA0R+0x8000;
      if((uiTemp-uiTranceiver)> T50ms) //400ms
      {
        P1OUT |= BIT3;
        P3OUT |= BIT3;
        break;
      }
    }while((uiTemp-uiTranceiver)<(T200ms+T200ms));
    
    P1OUT |= BIT3;
    UCA1IE &= ~UCRXIE; 
  }
}


void PortInit(void)
{      
  _DINT();
      
//  P1DIR=0xff;     P1OUT=0x00;  
//  P2DIR=0xff;     P2OUT=0x00; 
//  P3DIR=0xff;     P3OUT=0x00;

  P1DIR=0;  P2DIR=0;  P3DIR=0;
 
  P1OUT |= BIT3;
  P3OUT &= ~BIT3;
      
  _NOP();  
}


void Ucs_Init_16M(void)
{
  FRCTL0 = FRCTLPW | NWAITS_1;
  P2SEL0 |= BIT0 | BIT1; 
  do
  {
    CSCTL7 &= ~(XT1OFFG | DCOFFG);           // Clear XT1 and DCO fault flag
    SFRIFG1 &= ~OFIFG;
   } while (SFRIFG1 & OFIFG);                   // Test oscillator fault flag

  __bis_SR_register(SCG0);                           // disable FLL

  CSCTL3 |= SELREF__XT1CLK;
  CSCTL0 = 0;                                        // clear DCO and MOD registers
  CSCTL1 &= ~(DCORSEL_7);                            // Clear DCO frequency select bits first
  CSCTL1 |= DCORSEL_5;                               // Set DCO = 16MHz

  CSCTL2 = FLLD_0 + 487;                             // DCOCLKDIV = 16MHz

  __delay_cycles(3);
  __bic_SR_register(SCG0);                           // enable FLL
  while(CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1));         // FLL locked

  CSCTL4 = SELMS__DCOCLKDIV | SELA__XT1CLK;  // MCLK=SMCLK=DCO; ACLK=XT1

  PM5CTL0 &= ~LOCKLPM5;
}


void TimerA0CounterSetup(void)
{
  TA0CCTL0 |= CCIE;     // CCR0 interrupt enabled
  TA0CCR0 = 0x8000;
  TA0CTL = TASSEL_1 | TACLR | ID_3 | MC_1;            // ACLK, clear TAR,8��Ƶ��Up to CCR0
}

void APP_RTCPro_Delay_ms(unsigned int iTimes)
{
  for(unsigned int i=0;i<iTimes;i++)
  { 
    unsigned int uiTemp0=0; 
    unsigned int uiTranceiver0=TA0R; 
    do
    { 
      _NOP(); 
      if(TA0R>=uiTranceiver0) uiTemp0=TA0R; 
      else uiTemp0=TA0R+0x8000;   
    }while((uiTemp0-uiTranceiver0)<0x21 ); 
  }
}


/***********************************************************
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************************************************************/
#pragma vector=TIMER0_A0_VECTOR
__interrupt void Timer_A0_Counter (void)
{
  TA0CTL=TA0CTL&(~TAIFG);
  _BIC_SR_IRQ(LPM3_bits);	
  
}

对于MSP430，查看定时器寄存器的话，建议不要单步，您可以设置断点或者全速运行后暂停查看

测试例程如下

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 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *******************************************************************************
 *
 *                       MSP430 CODE EXAMPLE DISCLAIMER
 *
 * MSP430 code examples are self-contained low-level programs that typically
 * demonstrate a single peripheral function or device feature in a highly
 * concise manner. For this the code may rely on the device's power-on default
 * register values and settings such as the clock configuration and care must
 * be taken when combining code from several examples to avoid potential side
 * effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
 * for an API functional library-approach to peripheral configuration.
 *
 * --/COPYRIGHT--*/
//******************************************************************************
//  MSP430FR24xx Demo - Timer0_A3, Toggle P1.0, Overflow ISR, 32kHz ACLK
//
//  Description: Toggle P1.0 using software and the Timer0_A overflow ISR.
//  In this example an ISR triggers when TA overflows. Inside the ISR P1.0
//  is toggled. Toggle rate is exactly 0.5Hz. Proper use of the TAIV interrupt
//  vector generator is demonstrated.
//
//  ACLK = TACLK = 32768Hz, MCLK = SMCLK = 8MHz/2
//
//
//                MSP430FR2433
//             -----------------
//         /|\|                 |
//          | |                 |
//          --|RST              |
//            |                 |
//            |             P1.0|--> LED
//
//
//  Wei Zhao
//  Texas Instruments Inc.
//  Jan 2014
//  Built with IAR Embedded Workbench v6.20 & Code Composer Studio v6.0.1
//******************************************************************************
#include <msp430.h>

int main(void)
{
    WDTCTL = WDTPW | WDTHOLD;                    // Stop WDT

    // Configure clock
    __bis_SR_register(SCG0);                     // disable FLL
    CSCTL3 = SELREF__REFOCLK;                    // Set REFOCLK as FLL reference source
    CSCTL0 = 0;                                  // clear DCO and MOD registers
    CSCTL1 &= ~(DCORSEL_7);                      // Clear DCO frequency select bits first
    CSCTL1 |= DCORSEL_3;                         // Set DCOCLK = 8MHz
    CSCTL2 = FLLD_1 + 121;                       // FLLD = 1, by default, DCODIV = DCO/2 = 4MHz
    __delay_cycles(3);
    __bic_SR_register(SCG0);                     // enable FLL
    while(CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1));   // Poll until FLL is locked

    CSCTL4 = SELMS__DCOCLKDIV | SELA__REFOCLK;   // set ACLK = REFOCLK = 32768Hz, DCOCLK as MCLK and SMCLK source
    CSCTL5 |= DIVM0 | DIVS0;                     // SMCLK = MCLK = DCODIV = 4MHz

    // Configure GPIO
    P1DIR |= BIT0;
    P1OUT |= BIT0;

    // Disable the GPIO power-on default high-impedance mode to activate
    // previously configured port settings
    PM5CTL0 &= ~LOCKLPM5;

    // Configure Timer_A
    TA0CTL = TASSEL_1 | MC_2 | TACLR | TAIE;      // ACLK, count mode, clear TAR, enable interrupt

    __bis_SR_register(LPM3_bits | GIE);           // Enter LPM3, enable interrupts
    __no_operation();                             // For debugger
}

// Timer0_A3 Interrupt Vector (TAIV) handler
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector=TIMER0_A1_VECTOR
__interrupt void TIMER0_A1_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(TIMER0_A1_VECTOR))) TIMER0_A1_ISR (void)
#else
#error Compiler not supported!
#endif
{
    switch(__even_in_range(TA0IV,TA0IV_TAIFG))
    {
        case TA0IV_NONE:
            break;                               // No interrupt
        case TA0IV_TACCR1:
            break;                               // CCR1 not used
        case TA0IV_TACCR2:
            break;                               // CCR2 not used
        case TA0IV_TAIFG:
            P1OUT ^= BIT0;                       // overflow
            break;
        default:
            break;
    }
}