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TLV3601: The SPICE model of the device cannot simulate properly after being imported into ADS.

Part Number: TLV3601
Other Parts Discussed in Thread: LMG1020, TLV3604, PSPICE-FOR-TI, TINA-TI, , TLV3605

I attempted to use the TLV3604/3601 together with the LMG1020 to implement a low-side GaN FET driver, similar to the example provided by TI. However, even when keeping all electrical parameters identical to those used in the provided TINA example, I am still unable to obtain the correct results in ADS. The output of the TLV3604 consistently operates at a -100V common-mode level, which is clearly a mathematical simulation error.

Based on the information I found in forums, I cannot confirm whether this issue is caused by an incorrect pin numbering assignment.

Are there any possible approaches to troubleshoot this issue?

  • Hi,

    I'm not familiar with Keysight ADS, so I'm unsure how to support issues there. Could you please simulate using TINA-TI or PSpice-for-TI to see if you encounter the same issue?

  • Hi Links,

    Currently, the only simulation tool that can successfully run the related component group simulations is TINA. However, I would like to ask a more fundamental question. I tried to directly extract the compiled SPICE content from the TINA example, and I discovered that the SPICE model provided on the TI website for the TLV3604 is not the same as the one actually used in the TINA example.

    Interestingly, when I copied the SPICE description of the TLV3604 from TINA into ADS, it worked correctly, and the simulation results were consistent between both platforms. However, the same approach does not work for the TLV3601. Even when using the same model in both TINA and ADS, the results are not consistent.

    This inconsistency has left me quite confused. I would like to ask, at least for the TLV3604, which SPICE model should be considered more reliable? And what could be causing this discrepancy? What standards does TI follow when developing PSPICE models?

  • Hi Links,

    I'm sorry that you're facing issues with using the TLV3601 model.

    Peng said
    I discovred that the SPICE model provided on the TI website for the TLV3604 is not the same as the one actually used in the TINA example.

    Which TINA model and example are you referring to? Is it the "TLV3605 Clock and Data Recovery Circuit TINA-TI Reference Design" and the "TINA Model for TLV3604 (Rev. B)?"

    Peng said
    Interestingly, when I copied the SPICE description of the TLV3604 from TINA into ADS, it worked correctly, and the simulation results were consistent between both platforms. However, the same approach does not work for the TLV3601. Even when using the same model in both TINA and ADS, the results are not consistent.

    This is something we've noticed as well with users importing our .lib files into other simulators like LTSpice. There are many cases where they get errors even when the .lib files are the same as the TINA version. It's hard for us to know exactly what external simulators are doing when they import the .lib file and how it handles the netlists, and we can't debug or mitigate issues on software we don't use.

    Peng said
    I would like to ask, at least for the TLV3604, which SPICE model should be considered more reliable? And what could be causing this discrepancy? What standards does TI follow when developing PSPICE models?

    The model that is more up-to-date should be more reliable as any revisions to the models are usually to address issues with the model. You can usually tell the release date for the model in a comment at the top of the .lib file. TI does not have an overall standard across the whole company for TINA/PSpice modeling. Modeling responsibility is on each individual BU, so how each BU develops their device models may be different.

  • Hello, links. There is an inconsistency between the PSPICE model (REV E) provided on the official page of the TLV3604 and the TLV3604 model used in the TLV3601-based GaN FET driver circuit reference design in TINA-TI.

    The model used in the reference design is a high-level encapsulated behavioral model, whereas the model provided on the official page is not encapsulated but clearly describes the behavior more precisely (with more interconnected submodules). However, the only universally applicable PSPICE model is the one provided in the TINA-TI example.

    Additionally, I have noticed that the model used in the example seems to include a direct connection between the input and output through a resistor network. This is clearly unfavorable for high-speed applications. As a result, I am not entirely confident in the accuracy of the model used in TINA-TI. Is there a way to address this issue?

  • The inconsistency seems to be due to the release dates of the different files. The "TLV3601 GaN FET Driver Circuit" was released back in 2021 with an earlier version of the TLV3604 model. Since then, the TLV3604 model files themselves, "TINA Model for TLV3604 (Rev. B)" and "PSpice Model for TLV3604 (Rev. E)" have been revised, but we didn't go back into the "TLV3601 GaN FET Driver Circuit" to update them there.

    Could you please show me where you see this connection? I descended into the netlist of the TLV3604 within the "TLV3601 GaN FET Driver Circuit" and was unable to see this connection.
  • Hello Links,

    I took some time to reread the netlist, and it turns out that I made a mistake with the resistor connections—apologies for that. However, I would still like to confirm whether both models are reliable for simulation under short pulses (e.g., a 2ns trigger pulse).

    Additionally, when performing gate driver simulations for pulse response in TINA-TI, I noticed that the results differ between using the zero-state initial condition and calculating the operating point in the transient simulation. However, the reference design defaults to calculating the operating point for transient simulations. In a switching scenario, should I still consider the results based on this setting as the design reference?

    Thank you!

  • Hi,

    No worries about about the mistake; it's very hard to tell what each part of the netlist does unless you've actually seen the circuit it comes from.

    In terms of reliability with short pulses, it really depends on the input pulses you want to simulate. The TLV3604 model is a behavioral macromodel that simulates the typical specs of the TLV3604 according to its data sheet.The TLV3604 has a PWmin of 600ps, but the PWmin is not modeled in the TLV3604 model. This means that you won't see the output pulse width be lowered from the input pulse being <600ps in simulation. With a 2ns pulse, you will see the same pulse width reflected at the output with the typical delay of 800ps. To summarize, you won't see the output pulse width being lowered since the PWmin spec is not modeled.

    Setting the simulation to a zero-state initial condition means that all nodes are zeroed for the transient sim's t = 0 data point. This also means that the TLV3604 behavioral macromodel will take time to settle to its quiescent state. This isn't beneficial to your simulation as the behavioral macromodel start up time and behavior has no bearing on the actual physical device. You'd really want to see how the design behaves when all nodes are powered into its nominal bias state anyways, so I'd suggest keeping calculating the DC operating point on.

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