TMS320F28377D: TI的工程师你们好，28377D双核通信存在一个问题，具体问题如下：

//
// Included Files
//
#include "driverlib.h"
#include "device.h"
#include "board.h"
#include "F2837xD_device.h"     // F2837xD Headerfile Include File
//
// Defines
//
#define IPC_CMD_READ_MEM   0x1001
#define IPC_CMD_RESP       0x2001

#define TEST_PASS          0x5555
#define TEST_FAIL          0xAAAA


#pragma DATA_SECTION(readData, "readDataRAM")
uint32_t readData[10];
uint16_t IPCpass;
uint32_t pass;

IPC_MessageQueue_t messageQueue;
IPC_Message_t      TxMsg, RxMsg;
//
// Main
//
void main(void)
 {
    int i;

    //
    // Initialize device clock and peripherals
    //
    Device_init();

    //
    // Initialize PIE and clear PIE registers. Disables CPU interrupts.
    //
    Interrupt_initModule();

    //
    // Initialize the PIE vector table with pointers to the shell Interrupt
    // Service Routines (ISR).
    //
    Interrupt_initVectorTable();

    //
    // Initialize settings from SysConfig
    //
    Board_init();

    //
    // Give Memory Access to GS0/ GS14 SARAM to CPU02
    //必须在CPU2启动前分配
//        while( !(MemCfgRegs.GSxMSEL.bit.MSEL_GS0 &
//                 MemCfgRegs.GSxMSEL.bit.MSEL_GS14))
    while( !(MemCfgRegs.GSxMSEL.bit.MSEL_GS14))//GS14未分配给CPU02则循环
        {
            EALLOW;
            MemCfgRegs.GSxMSEL.bit.MSEL_GS0 = 0;// 将 GS0 分配给 CPU01
            MemCfgRegs.GSxMSEL.bit.MSEL_GS14 = 1;// 将 GS14 分配给 CPU02
            EDIS;
        }
    //
    // Give memory access to GS0 and GS14 RAM to CPU2
    // driverlib库开发写法
//    MemCfg_setGSRAMMasterSel((MEMCFG_SECT_GS0 | MEMCFG_SECT_GS14),
//                             MEMCFG_GSRAMMASTER_CPU2);
//    MemCfg_setGSRAMMasterSel((MEMCFG_SECT_GS14),
//                             MEMCFG_GSRAMMASTER_CPU2);

    //
    // Initialize GPIO and configure the GPIO pin as a push-pull output
    //
    Device_initGPIO();

    GPIO_setPadConfig(99, GPIO_PIN_TYPE_STD);
    GPIO_setDirectionMode(99, GPIO_DIR_MODE_OUT);
    GPIO_setMasterCore(99, GPIO_CORE_CPU1);

    GPIO_setPadConfig(133, GPIO_PIN_TYPE_STD);
    GPIO_setDirectionMode(133, GPIO_DIR_MODE_OUT);
    GPIO_setMasterCore(133, GPIO_CORE_CPU2);


    //
    // Clear any IPC flags if set already
    //
    IPC_clearFlagLtoR(IPC_CPU1_L_CPU2_R, IPC_FLAG_ALL);

    //
    // Initialize message queue
    //
    IPC_initMessageQueue(IPC_CPU1_L_CPU2_R, &messageQueue, IPC_INT1, IPC_INT1);

    //
    // Synchronize both the cores
    //
    IPC_sync(IPC_CPU1_L_CPU2_R, SYNC_FLAG);



    //
    // Enable Global Interrupt (INTM) and realtime interrupt (DBGM)
    //
    EINT;
    ERTM;

    //
    // Fill in the data to be sent
    //
    for(i=0; i<10; i++)
    {
        readData[i] = i;
    }

    //
    // Update the message
    //
    TxMsg.command = IPC_CMD_READ_MEM;
    TxMsg.address = (uint32_t)readData;
//    TxMsg.address = (uint32_t)readData;
    TxMsg.dataw1  = 10;  // Using dataw1 as data length
    TxMsg.dataw2  = 1;   // Message identifier


    //
    // End of example. Loop forever
    //
    while(1)
    {
        DEVICE_DELAY_US(1000000);
//        GPIO_togglePin(133);
        GPIO_togglePin(99);
        IPC_sendMessageToQueue(IPC_CPU1_L_CPU2_R, &messageQueue, IPC_ADDR_CORRECTION_ENABLE,
                               &TxMsg, IPC_BLOCKING_CALL);

        IPC_readMessageFromQueue(IPC_CPU1_L_CPU2_R, &messageQueue, IPC_ADDR_CORRECTION_DISABLE,
                                 &RxMsg, IPC_BLOCKING_CALL);

        if((RxMsg.command == IPC_CMD_RESP) && (RxMsg.dataw1 == TEST_PASS) && (RxMsg.dataw2 == 1))
        {
            pass = 1;
            IPCpass++;
        }
        else
            pass = 0;
    }
}